Boots – shoes – and leggings
Patent
1978-06-05
1980-02-19
Chapnick, Melvin B.
Boots, shoes, and leggings
G06F 1300, G06F 738, G11C 800
Patent
active
041897676
ABSTRACT:
An address translator, which is designated to operate in a fraction of the memory cycle time, and associated modular organized memory accepts logical addresses and converts each to a corresponding physical address. Each physical address uniquely identifies a particular module and a particular storage location therein for data transfer. The overall structure is adaptable for full utilization of a variable number of modules occasioned by failure thereby providing a soft fail feature. The access time provided by the address translator and associated modules remains constant independent of the storage location being used. Adaption for accommodating changes in the number of modules is provided by altering the parameters of the address translation and changing the identification constants associated with each module.
REFERENCES:
patent: 3813652 (1974-05-01), Elmer et al.
patent: 3949378 (1976-04-01), Crabb et al.
patent: 3980874 (1976-09-01), Vora
patent: 4025903 (1977-05-01), Kaufman et al.
patent: 4041290 (1977-08-01), Fressineau et al.
patent: 4051551 (1977-09-01), Lawrie et al.
patent: 4064400 (1977-12-01), Akushsky et al.
patent: 4124893 (1978-11-01), Joyce et al.
Bell Telephone Laboratories Incorporated
Chapnick Melvin B.
Moran John F.
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