Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-06-03
2008-06-03
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185090
Reexamination Certificate
active
07382655
ABSTRACT:
An access time adjusting circuit is used in a non-volatile memory to obtain an optimized access time in operation. The circuit includes an access time detecting unit, used to detect a performance status of the non-volatile memory under an operation clock and output the performance status. An access time controlling unit is used to generate at least one adjusting operation clock. Each adjusting operation clock serves as the operation clock for the non-volatile memory. In addition, the non-volatile memory, the access time controlling unit, and the access time detecting unit are connected to form a detection and adjustment loop, so that an optimized operation clock is determined after checking the at least one adjusting operation clock.
REFERENCES:
patent: 5257221 (1993-10-01), Leak et al.
patent: 6285621 (2001-09-01), Beer
patent: 6324653 (2001-11-01), Lisart et al.
patent: 6519716 (2003-02-01), Branstad
patent: 2006/0174057 (2006-08-01), Chen et al.
Jianq Chyun IP Office
Solid State System Co. Ltd.
Tran Andrew Q.
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