Access control method for a shared main memory in a multiprocess

Details Access control method for a shared main memory in a multiprocess Access control method for a shared main memory in a multiprocess

1994-10-24

1997-02-25

Kim, Matthew M.

395470, 395471, 395472, G06F 1208

Patent

active

056066864

ABSTRACT:
A main memory shared by plural processing units in a parallel computer system is composed of plural partial main memories. A directory for each data line of the main memory is generated after the data line has been cached in one of the processing units. The directory is held in one of the partial main memories in place of the data line. The directory indicates a processing unit which has cached the data line. A status bit C provided for the data line is set. If a subsequent read request is given to the data line, the status C bit is checked and the directory is used to identify a processing unit that has cached the data line. The request is transferred to the identified processing unit, and the data line is transferred from that processing unit to the processing unit that has issued the request. If a processing unit that has cached the data line has replaced the data line, it is checked if there is a processing unit that has cached the data line. If there is none, the data line is written back into the one partial main memory. If there is, the data line is not written back. Another status bit RO is also used for each data line. It indicates if the data line is read only. If a data line is read only, generation of the directory and storing it in the partial main memory is prohibited.

REFERENCES:
patent: 4755930 (1988-07-01), Wilson, Jr. et al.
patent: 5058006 (1991-10-01), Durdan et al.
patent: 5193163 (1993-03-01), Sanders et al.
patent: 5287484 (1994-02-01), Nishii et al.
patent: 5317720 (1994-05-01), Stamm et al.
patent: 5359723 (1994-10-01), Mathews et al.
The Stanford Dash Multiprocessor, IEEE Computer, Mar. 1992, pp. 63-79.
Directory-based Cache Coherence in Large-Scale Multiprocessors, IEEE Computer, 1990 Jun., pp. 49-58.
The Stanford FLASH Multiprocessor, Proc. of the 21st Annual International Symposium on Computer Architecture 1994 Apr. 18-21, pp. 302-313.

Affiliated with

Also associated with

Rating

Access control method for a shared main memory in a multiprocess does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Access control method for a shared main memory in a multiprocess, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Access control method for a shared main memory in a multiprocess will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1980674