Access control for a plurality of modules to a common bus

Details Access control for a plurality of modules to a common bus Access control for a plurality of modules to a common bus

1984-01-18

1987-03-24

Weldon, Ulysses

Communications: electrical

Continuously variable indicating

With meter reading

34082551, 370 85, H04Q 100

Patent

active

046528733

ABSTRACT:
A priority system for controlling the sequence in which requests made by modules, connected in parallel to a common bus, for access to the common bus is granted. A bus busy line is maintained at a first predetermined voltage if the common bus is not busy, and at a second predetermined voltage if the common bus is busy. A control and timing logic unit in each module senses the voltage on the bus busy line and permits access by the module to the common bus if the bus is at the first predetermined voltage (not busy). The control and timing logic unit then drives the voltage on the bus busy line to the second predetermined voltage, to indicate that the common bus is in use, thereby prohibiting access by other modules.

REFERENCES:
patent: 3832689 (1974-08-01), Means et al.
patent: 3838394 (1974-09-01), Sandoval
patent: 4337465 (1982-06-01), Spracklen et al.
patent: 4411004 (1983-10-01), Graham

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