Access arbitration system to several processors or microprocesso

Details Access arbitration system to several processors or microprocesso Access arbitration system to several processors or microprocesso

1982-09-03

1985-02-12

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1516

Patent

active

044995385

ABSTRACT:
The invention relates to an access system to several processors having common resources by means of a common bus.
For each processor this system comprises an arbitration means for access request conflicts. The arbitration means comprises access request processing means connected to the bus and to the processor and an access priority resolution circuit connected to the bus, to the access request processing means and to the processor. The resolution circuit is able to allocate mixed, cyclic or mixed fixed and cyclic priorities to the access requests.
Application to the management of access requests for processors or microprocessors having common resources, such as memories.

REFERENCES:
patent: 3798591 (1974-03-01), Phillips et al.
patent: 4237534 (1980-12-01), Felix
Nadir et al.: "Bus Arbiter Streamlines Multiprocessor Design", pp. 103-109, Computer Design, vol. 19, No. 6, Jun. 1980 Concord (US).
W. W. Plummer: "Asynchronous Arbiters", pp. 37-42; IEEE Transactions on Computers, vol. C-21, No. 1, Jan. 1972.
M. Courvoisier et al: "A self-testing arbiter circuit for multimicrocomputer systems", pp. 281-283, Digest of Papers, FTCS-10, The 10th International Symposium on Fault-Tolerant Computing, Kyoto, Japan, Oct. 1-3, 1980, The Institute of Electrical and Electronics Engineers, Inc.
Durham: "Fast LSI arbiters supervise priorities for bus-access in multiprocessor systems", pp. 128-133, Electronic Design, vol. 11, May 24, 1979, Rochelle Park (US).

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