Accelerator for mounting and interfacing a second CPU onto a mot

Details Accelerator for mounting and interfacing a second CPU onto a mot Accelerator for mounting and interfacing a second CPU onto a mot

1996-02-27

1997-11-11

Butler, Dennis M.

395555, 395556, G06F 104

Patent

active

056873581

ABSTRACT:
The present invention provides an accelerator working in place of a CPU on a motherboard to speed up the processing. The accelerator can realize the high-speed processing even when a clock on the accelerator is not an integral multiple of a clock on the CPU. When a clock frequency of a clock signal CLK on the motherboard is equal to 20 MHz and a maximum frequency of a CPU (3) on an accelerator (100) is equal to 33 MHz, for example, the CPU (3) does not work properly by a doubled clock signal. In such a case, a clock multiplication circuit (3a) multiplies the clock signal CLK by 1.5 times to generate a clock signal CLK15. There are three different patterns in the relationship between the timing of access of the CPU 3 and the timing of access of the motherboard. The accelerator of the invention determines the appropriate timing in each case and allows the access of the CPU 3 to be synchronous with the access of the motherboard.

REFERENCES:
patent: 4688237 (1987-08-01), Brault
patent: 5187722 (1993-02-01), Petty
patent: 5204676 (1993-04-01), Herrmann
patent: 5325490 (1994-06-01), Brasseur
patent: 5347559 (1994-09-01), Hawkins et al.
patent: 5450574 (1995-09-01), Madter et al.
patent: 5455927 (1995-10-01), Huang
patent: 5506981 (1996-04-01), Madter
C't-Magzin fur Computertechnic, 1991, nr. 7 pp. 55-57, Heise GmbH & Co., Hannover, Germany.
IBM Technical Disclosure Bulletin, vol. 33, No. 3B, Aug. 1990 New York US, pp. 112-113.

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