Accelerated turn-off of MOS transistors by bootstrapping

Electric power conversion systems – Current conversion – With voltage multiplication means

Reexamination Certificate

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Reexamination Certificate

active

06275395

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a technique for controlling an MOS pass transistor in a power controller and, in particular, for more quickly turning off the pass transistor in the event of a high current through the transistor, such as in the event of a short circuit.
BACKGROUND
FIG. 1
illustrates a typical power controller
10
that provides soft-startup and short-circuit protection for any load. The controller
10
receives an on/off control signal and, in response, turns pass transistor
12
on or off to couple the input voltage Vin at input terminal
14
to a load
16
. The load may be a low-voltage electronic system.
The pass transistor
12
is an NMOS transistor whose gate voltage must be significantly above its source voltage in order to fully turn on. Since, ideally, the voltage applied to load
16
is approximately the same voltage as Vin, the gate voltage must be significantly higher than the input voltage Vin. Accordingly, a charge pump
18
is used to double or triple the input voltage, and the multiplied voltage is coupled to the gate of the pass transistor
12
in response to the on/off signal applied to terminal
20
. Capacitively switched voltage doublers and voltage triplers are well known and need not be described. A gate filter capacitor
21
is commonly used to filter the signal from the charge pump
18
.
The circuitry described above is commonly used to selectively apply power to various loads in a system, where a number of the circuits of
FIG. 1
are connected to the same power supply. When the pass transistor
12
is turned on for a capacitive load (the load may include a large filter capacitor), there will be a large inrush current through the pass transistor
12
. This inrush current is not only dangerous for the pass transistor
12
but it will momentarily lower Vin, causing a brown-out of other systems powered from the same supply line. To limit the current through the pass transistor
12
, a current limiting circuit is employed. This current limiting circuit typically includes a low value current sense resistor R
1
, where the voltage across the resistor R
1
is proportional to the current through the pass transistor
12
. This voltage is applied to a differential amplifier
22
to obtain a voltage proportional to the current. The output of amplifier
22
is applied to an input of a second differential amplifier
24
. The differential amplifier
24
has another of its inputs connected to a reference voltage that is set to a current threshold limit.
As the current through sense resistor R
1
reaches the current limit, the output of differential amplifier
24
controls an NMOS transistor
26
to shunt current from the gate of the pass transistor
12
so as to limit the current through pass transistor
12
to at or below the threshold current. The input voltage Vin powers the differential amplifier
24
so that the maximum gate voltage to the NMOS transistor
26
is Vin.
The current limiting circuitry in
FIG. 1
is also referred to as a hot-swap controller, since it allows the load
16
to be replaced with another load while avoiding the current surging that could cause a brown-out of other systems connected to the same supply voltage Vin.
In the event of a short circuit in load
16
, it is desirable that the NMOS transistor
26
be quickly turned on to shut off pass transistor
12
. The load may be low voltage electronic circuitry that can operate with voltages as low as 2 volts. With a low input voltage Vin, the turn on time of the NMOS transistor
26
is relatively high and the discharging capability of transistor
26
is relatively limited, delaying the turn off of the pass transistor
12
. One solution for speeding up the turn-on time of the NMOS transistor
26
is to use a very large NMOS transistor
26
. Another solution is to substitute transistor
26
with a bipolar transistor. Using a large NMOS transistor
26
undesirably uses up die area, and forming a bipolar transistor complicates the manufacturing process.
What is needed is a technique for quickly turning on NMOS transistor
26
that does not suffer the drawbacks described above.
SUMMARY
A controller for limiting the current through a pass transistor is described herein that includes an NMOS control transistor coupled between the gate of the pass transistor and ground. The gate of the pass transistor is coupled to a bootstrap circuit, such as a charge pump, that provides a higher voltage than the input supply voltage. The bootstrap circuit is controlled to selectively turn on and off the pass transistor to provide power to a load.
The gate of the NMOS control transistor is coupled to the bootstrap circuit via a PMOS transistor. The PMOS transistor is turned on in the event of a current limit signal to momentarily apply the bootstrap voltage to the gate of the NMOS control transistor. This quickly turns on the NMOS control transistor to discharge the gate of the pass transistor, shutting off the pass transistor and terminating the high current situation.
After the bootstrapped voltage has been shunted to ground, a reverse biased diode allows the gate of the NMOS control transistor to remain charged to keep the NMOS control transistor on. After the current limit situation has passed, the NMOS control transistor is switched off.
Accordingly, short circuits in the load are quickly uncoupled from the remainder of the system by the fast reaction time of the NMOS control transistor.


REFERENCES:
patent: 4454571 (1984-06-01), Miyashita
patent: 4803612 (1989-02-01), Skovmand
patent: 5029063 (1991-07-01), Lingstaedt et al.
patent: 5606491 (1997-02-01), Ellis
patent: 5635776 (1997-06-01), Imi
patent: 5670869 (1997-09-01), Weisenbach
patent: 6188210 (2001-02-01), Tichauer et al.
patent: 6215348 (2001-04-01), Steensgaard-Madsen

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