Accelerated switching input circuit

Details Accelerated switching input circuit Accelerated switching input circuit

1989-07-28

1990-11-20

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307290, 307359, H03K 3295, H03K 19013, H03K 19086, H03K 1704

Patent

active

049721038

ABSTRACT:
An accelerated switching input circuit includes an emitter coupled logic stage having two transistors. The first transistor receives at its base an input signal and the second transistor receives at its base a control signal generated from the signal at the collector of the first transistor. A third transistor (T.sub.6) has its base connected to the collector of the first transistor (T.sub.3). A first resistor (R.sub.10), a second resistor (R.sub.11) and a third resistor (R.sub.12) are disposed in series between the emitter of the third transistor and a reference voltage (U.sub.REF) source. The point B common to the resistors R.sub.11 and R.sub.12 is coupled to the base of the second transistor (T.sub.4).

REFERENCES:
patent: 3558914 (1971-01-01), Schmidt
patent: 3646361 (1972-02-01), Pfiffner
patent: 3694198 (1987-09-01), Umeki
patent: 4629913 (1986-12-01), Lechner
patent: 4835455 (1989-05-01), Coddington et al.
Pelka, "Schmitt-Trigger Inverter With Hystersis", Electronics, vol. 35, No. 12, Jun. 1986.
Dickes et al., "A Graphical Analysis of the Schmitt Circuit", IEEE Journal of Solid State Circuits, vol. SC-17, No. 6, Dec. 1982.

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