Accelerated interface between processors and hardware adapters

Details Accelerated interface between processors and hardware adapters Accelerated interface between processors and hardware adapters

1994-09-19

1996-09-03

Tung, Kee Mei

Computer graphics processing and selective visual display system

Display driving control circuitry

Controlling the condition of display elements

395164, 395166, 345132, 345185, G06F 1500

Patent

active

055532284

ABSTRACT:
Overall graphics performance in a computer graphics system is improved by an accelerated interface between high performance microprocessors and hardware adapters which is a combination of hardware and software and which is independent of specific computer languages. The interface was specifically designed for any hardware attached to a central processing unit (CPU) that does not enforce the order of memory accesses. The hardware supported process fools the CPU into thinking that the write and read are accessing the same address, thus guaranteeing that the order of the write and read are correct. In a first method, a hardware pseudo-address are created on the display adapter. When the software writes to the pseudo-address, the display adapter writes the data to the coordinate register. When the software reads from the pseudo-address, the display adapter returns the contents of the actual status address. In the second method, the software writes and reads from the coordinate address; however, when the software reads from the coordinate address, the display adapter does not return the contents of the coordinate address. Instead, the adapter actually reads and returns the contents of the status address.

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