Accelerated event queue for logic simulation

Details Accelerated event queue for logic simulation Accelerated event queue for logic simulation

2007-11-27

2007-11-27

Shah, Kamini (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C703S015000, C703S016000, C703S017000

Reexamination Certificate

active

10388687

ABSTRACT:
An event queue for use with a software-enabled logic simulation tool can include a heap array and a hash table data structure. The heap array can include time slots organized such that each time slot conforms to heap properties which specify, at least in part, that a root node of the array indicates a time slot having a minimum simulation time value. The hash table data structure can include a plurality of entries, wherein selected ones of the entries specify references to at least one of the time slots.

REFERENCES:
patent: 6324495 (2001-11-01), Steinman
patent: 6437802 (2002-08-01), Kenny
patent: 6757794 (2004-06-01), Cabrera et al.
patent: 6961689 (2005-11-01), Greenberg
Thomas H. Cormen et al.; “Introduction to Algorithms”; Twelfth printing, 1994; Copyright 1990 by The Massachusetts Institute of Technology; McGraw-Hill Book Company; pp. 140-146.

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