Electric power conversion systems – Current conversion – Using semiconductor-type converter
Reexamination Certificate
2000-10-25
2002-07-16
Wong, Peter S. (Department: 2838)
Electric power conversion systems
Current conversion
Using semiconductor-type converter
C363S017000, C368S204000
Reexamination Certificate
active
06421263
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an AC voltage detection circuit and method suitable for raising a charging efficiency, a charging circuit and method having a high charging efficiency, a chopper charging circuit and method, an electronic apparatus, and a timepiece.
2. Description of the Related Art
As a charging circuit for charging a capacitor or a battery with the AC voltage generated by a generator, a bridge type charging circuit has been known.
FIG. 51
is a circuit diagram of a conventional charging circuit (Japanese Unexamined Patent Publication (Kokai) No. 9-131064). In this charging circuit, provision is made of comparators COM
1
and COM
2
for comparing voltages of output terminals AG
1
and AG
2
of a generator AG with a power supply voltage Vdd, comparators COM
3
and COM
4
for comparing the voltages of the output terminals AG
1
and AG
2
of the generator AG with the voltage of a ground GND, and a capacitor C having a large capacity for storing a charging current. P- and N-channel FETs P
1
, P
2
, N
1
, and N
2
are controlled ON and OFF by output of the comparators COM
1
to COM
4
.
Here, when the voltage of the output terminal AG
1
becomes the voltage of the ground GND or less, the N-channel FET N
1
is brought to the ON state by the comparator COM
3
, so the output terminal AG
1
is grounded. Further, when the voltage of the output terminal AG
2
exceeds the power supply voltage Vdd, the P-channel FET P
2
is turned ON by the comparator COM
2
, so a charge is stored in the capacitor C through a route indicated by the arrow. In this case, so far as the voltage of the output terminal AG
2
does not exceed the power supply voltage Vdd, the P-channel FET P
2
does not turn ON, so a current flows through a route reverse to that indicated by the arrow, to thereby prevent an inconvenience such as a reduction of the charging efficiency.
In this way, in the charging circuit of the related art for charging AC voltage, field effect transistors and comparators are combined to construct a one-directional unit for sending current in one direction under certain conditions and thereby raise the charging efficiency.
In this charging circuit, even in the period when the generator AG does not generate electricity, electrical energy stored in the capacitor C is consumed by the comparators, so there is the problem of a reduction of the charging efficiency.
Further, as a charging circuit charging even when the induced voltage generated in the generator is small, there is a chopper charging circuit.
FIG. 52
is a circuit diagram of a chopper charging circuit of the related art (Japanese Unexamined Patent Publication (Kokai) No. 10-282264).
This chopper charging circuit A is provided with comparators COM
1
and COM
2
for comparing the voltages of the output terminals AG
1
and AG
2
of the generator AG with the power supply voltage Vdd, P-channel FETs P
1
, P
2
controlled ON and OFF by output signals SP
1
and SP
2
of the comparators COM
1
and COM
2
, an oscillator circuit B for outputting a clock signal CL, an AND circuit AND for calculating an AND logic of the output signals SP
1
and SP
2
of the comparators COM
1
and COM
2
and the clock signal CL, N-channel FETs N
1
, N
2
controlled by an output signal SN of the AND circuit AND, and a capacitor C having a large capacity for storing the charging current. Here, diodes d
1
, d
2
, d
3
, and d
4
are parasitic diodes of the P- and N-channel FETs P
1
, P
2
, N
1
, and N
2
respectively.
Next, an explanation will be made of an operation of this chopper charging circuit A by using a timing chart shown in FIG.
53
. In this example, it is assumed that, up to a time ta, the voltages of the output terminals AG
1
and AG
2
are the power supply voltage vdd or less, the output signals SP
1
and SP
2
of the comparators COM
1
and COM
2
are maintained at the high level, and the P-channel FETs P
1
and P
2
are in the OFF state.
First, in this chopper charging circuit A, when the clock signal CL becomes the high level at the time ta, the output signal SN of the AND circuit AND becomes the high level, so the N-channel FETs N
1
and N
2
become the ON state, and a short-circuit route of the AC generator AG and N-channel FETs N
1
and N
2
is formed. In this case, when induced voltage is generated on for example the output terminal AG
1
side in accordance with the induced voltage of the AC generator AG, as indicated by a symbol a in
FIG. 52
, a current i
1
flows through the route from the AC generator AG via N-channel FET N
1
to N-channel FET N
2
.
Then, when the clock signal CL becomes the low level at a time tb, the output signal SN of the AND circuit AND becomes the low level, so the N-channel FETs N
1
and N
2
become the OFF state, and the short-circuit route is cut. In this case, while the clock signal CL is at the high level (hereinafter, referred to as a “short-circuit period”), energy is stored in an inductance of an output coil of the AC generator AG by the current flowing through the short-circuit route, and the voltage of the output terminal AG
1
is boosted by this energy. Then, when the voltage of the output terminal AG
1
is boosted to the power supply voltage Vdd or more at a time tc, the output signal SP
1
of the comparator COM
1
turns tothe low level, and the P-channel FET P
1
turns to the ON state. Consequently, as indicated by a symbol &bgr; in
FIG. 52
, a charging current i
2
flows through a charging route from the diode d
4
via AC generator AG and P-channel FET P
1
to capacitor C, so that the capacitor C is charged.
In this case, along with progress in the charging, the energy stored in the inductance of the output coil is gradually discharged, and the charging current i
2
is gradually reduced. Then, when the voltage of the output terminal AG
1
becomes the power supply voltage Vdd or less, the output signal SP
1
of the comparator COM
1
becomes the high level, the P-channel FET P
1
switches to the OFF state, and the charging route mentioned above is cut. Namely, until the voltage of the output terminal AG
1
becomes the power supply voltage Vdd or less, the N-channel FETs N
1
and N
2
are maintained in the OFF state by the AND circuit AND, and the charging is continued.
Accordingly, when the amount of the generated power of the AC generator AG is large and the energy stored in the inductance of the output coil is large, the charging is continued even if shifting to the short-circuit period. Note that when induced voltage is generated on the output terminal AG
2
side of the AC generator AG, the direction of the current i
1
flowing through the above short-circuit route becomes reverse, and the voltage of the output terminal AG
2
is boosted. Consequently, the charging current i
2
flows through the charging route from the diode d
3
via AC generator AG and P-channel FET P
2
to capacitor C, so that the capacitor C is charged.
In this way, the chopper charging circuit of the related art boosts the voltage by converting the induced voltage of the AC generator to the chopper voltage and thereby can charge even when the induced voltage generated in the AC generator is small.
Incidentally, in a comparator configured by a field effect transistors, the lower in transition frequency, the smaller the current consumption. Further, the operating speed of the comparator is determined by the transition frequency of the field effect transistor configuring the comparator, so the smaller the current consumption, the slower the operation of the comparator. For this reason, as mentioned above, when a low current consumption type power generation detection comparator is provided in the charging circuit, the comparator cannot detect the induced voltage even if an induced voltage exceeding a threshold voltage is generated, so detection of power generation is not done quickly.
Here, it may be considered to detect power generation early by lowering the threshold voltage of the power generation detection comparator. However, by lowering the threshold voltage, a malfu
Laxton Gary L.
Seiko Epson Corporation
Watson Mark P.
Wong Peter S.
LandOfFree
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