Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Patent
1981-01-29
1983-05-10
Shoop, William M.
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
307296R, G05F 146
Patent
active
043832164
ABSTRACT:
An on chip delay regulator circuit which varies the power in logic or array circuits on the chip so as to minimize, or eliminate, chip to chip circuit speed differences caused by power supply variations and/or lot to lot process differences, temperature, etc. The on chip delay regulator accomplishes this by comparing a periodic reference signal to a periodic on chip generated signal which is sensitive to power supply changes, lot to lot process changes, temperature, etc. The comparison creates an error signal which is used to change the power (current or voltage) supplied to the on chip circuits. By changing the circuit power, the circuit speed (gate delay) is increased or decreased as necessary to maintain a relatively constant circuit speed on each chip. For example, a plurality of integrated circuit chips each contain an on chip delay regulator. The on chip delay regulator on each chip of said plurality of integrated circuit chips receives and responds to the same signal (or clock). Each chip provides a discrete on chip generated signal related to the parameters of the chip. The gate delay (or speed) of the circuitry on each chip is determined by its on chip delay regulator under control of the common reference signal (or clock). At least certain of the chips include an AC measurement circuit for comparing the periodicity of said reference signal with the periodicity of said on generated chip signal and cooperating with the delay regulator thereof to provide one of three discrete electrical manifestations.
REFERENCES:
patent: Re29619 (1978-04-01), Pastoriza
patent: 3602799 (1971-08-01), Guillen
patent: 3736477 (1973-05-01), Berger et al.
patent: 3743850 (1973-07-01), Davis
patent: 3754181 (1973-08-01), Kreitz et al.
patent: 3758791 (1973-09-01), Taniguchi et al.
patent: 3778646 (1973-12-01), Masaki
patent: 3794861 (1974-02-01), Bernacchi
patent: 3803471 (1974-04-01), Price et al.
patent: 3808468 (1974-04-01), Ludlow et al.
patent: 3978473 (1976-08-01), Pastoriza
patent: 4004164 (1977-01-01), Cranford, Jr. et al.
patent: 4029974 (1977-06-01), Brokaw
patent: 4100431 (1978-07-01), Stipanuk
patent: 4145621 (1979-03-01), Colaco
patent: 4160934 (1979-07-01), Kirsch
patent: 4172992 (1979-10-01), Culmer et al.
patent: 4287437 (1981-09-01), Brosch et al.
IBM TDB, "Current Source Generator", by G. Keller et al., vol. 12, No. 11, Apr. 1970, p. 2031.
"Precision Integrated Current Source", by A. Cabiedes et al., vol. 13, No. 6, Nov. 1970, p. 1699, (IBM TDB).
"Adjustable Underfrequency-Overfrequency Limiting Circuit", by W. B. Nunnery, vol. 15, No. 6, Nov. 1972, pp. 1927-1929, (IBM Technical Disclosure Bulletin).
IBM TDB, "Voltage Reference Buffer", by J. A. Dorler et al., vol. 14, No. 7, Dec. 1971, p. 2095.
"Reference Voltage Generator and OFF-Chip Driver for Current Switch Circuit", by A. Brunin, vol. 21, No. 1, Jun. 1978, pp. 219-220, (IBM TDB).
"Gated Current Source", by J. W. Spencer, Jr., vol. 21, No. 7, Dec. 1978, pp. 2719-2720, (IBM TDB).
"Integrated Injection Logic Shaping Up as Strong Bipolar Challenge to MOS", Electronic Design 6, Mar. 15, 1974, pp. 28 and 30.
"I.sup.2 L Puts It All Together for 10-bit A-D Converter Chip", by Paul Brokaw, Electronics, Apr. 13, 1978, pp. 99-105.
IBM Technical Disclosure Bulliten, "Chip Performance Regulator Using On-Chip Voltage Controlled Oscillator", K. R. King, vol. 23, No. 2A, Dec. 1980, pp. 2631-2632.
"Delay Regulation A Performance Concept", F. Berndlmaier et al., Proceedings IEEE International Conference on Circuits and Computers, ICCC80, vol. 2 of 2, Oct. 1980.
Dorler Jack A.
Jenkins Michael O.
Mosley Joseph M.
Weitzel Stephen D.
DeBruin Wesley
International Business Machines - Corporation
Shoop William M.
LandOfFree
AC Measurement means for use with power control means for elimin does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with AC Measurement means for use with power control means for elimin, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and AC Measurement means for use with power control means for elimin will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-527779