Data processing: measuring – calibrating – or testing – Testing system – Of circuit
Reexamination Certificate
2001-09-28
2004-07-13
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Testing system
Of circuit
C363S021100
Reexamination Certificate
active
06763314
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to integrated circuit devices, and more particularly to an AC defect detection and failure avoidance power up and diagnostic system.
2. Description of the Related Art
Relentless market demands have spawned unprecedented advancements in technology and catapulted technology suppliers into the realm of GHz processors, exponential number of transistors, revolutionary materials and deep submicron dimensions. As a result, the task before the testing and reliability engineer is daunting to say the least. Defects, which were and could be previously ignored, are now catastrophic in increasing frequency.
Insatiable performance and function require picosecond accuracy and miles of wiring per chip. In fact, six to eight wiring levels are common in the industry, resulting in an explosion of vias and contacts per chip. Conversely, smaller chip sizes dictate smaller via diameters while GHz speeds rely on constant dielectric thicknesses. All of this results in profound increases in via aspect ratios, thereby making vias one of the most difficult structures to fabricate. Hence, the defect mix is shifting to a greater percentage of resistive defects (opens). Data demonstrates that resistive defects are much more difficult to detect and even more difficult to stress.
Furthermore, ominous trends in test data, reliability modeling, and limitations in application methodology do not bode well for maintaining customer expectations in the quality and reliability of deep submicron semiconductor products in the imminent future.
In fact, advancements in deep submicron silicon manufacturing processes are enabling a doubling of chip performance every 12-18 months, which has manifested itself in processor speeds in excess of 1 GHz. At these frequencies, defects causing picosecond degradation, which were previously ignored in prior generations of systems, are increasingly causing system errors and malfunctions in the field to the point where today “AC/delay defects” are the primary cause of card/system/field quality problems. It has been shown that running test patterns on integrated circuits (ICs) at Very Low Voltage (VLV) has been successful in detecting a percentage of these high speed delay faults during the normal manufacturing test of the ICs. Additionally, data also shows that defects detected through the application of VLV testing have a higher probability of becoming a reliability failure. It has also been found that other types of resistive opens and resistive shorts can be detected using VLV testing. Currently, there is no known solution for system level AC defect detection and failure avoidance diagnostics. Therefore, there is a need for a new and improved diagnostic system that identifies resistive defects prior to machine failure.
SUMMARY OF THE INVENTION
In view of the foregoing and other problems, disadvantages, and drawbacks of the conventional diagnostic systems, the present invention has been devised, and it is an object of the present invention to allows system suppliers to detect and identify subtle resistive defects before they manifest themselves as machine failures.
In order to attain the object suggested above, there is provided, according to one aspect of the invention a method for detecting AC defects and enabling failure avoidance in a system comprising the steps of first, lowering a system voltage to a predetermined voltage level. Second, the system is powered up. Third, diagnostic routines are performed. Next, failures of the lower operating voltage conditions are logged into the system. Then, the system is powered down. After which, the system voltage is raised to a normal operating voltage. Thereupon, the system is powered up at a normal operating voltage. Next, discrepancies between the failures of the lower operating voltage conditions and normal operating voltage conditions are logged, and finally, the logging discrepancies between the failures of the lower operating voltage conditions and normal operating voltage conditions are compared and analyzed. The predetermined voltage level is capable of detecting delay faults. Moreover, the predetermined voltage level is at the very low voltage level.
Although AC or timing-related defects are the best known class of failures detectable with VLV testing, there are other types of defects that have also been found to be detectable with VLV testing. For example, resistive opens and resistive shorts, improperly doped implants, and transistor leakage defects are detectable by VLV testing; even before these defects cause a hard system failure. These are defects types which also may degrade during system operation and become a reliability failure. Thus, VLV testing can detect a wide class of defects that initial cause only marginal performance behavior or differences, but which later may become hard system failures.
Again, there are no known solutions for system level AC defect detection and failure avoidance diagnostics, especially for systems at the chip performance and processor speed levels currently used and being developed. Therefore, the present invention solves the need for a diagnostic system that identifies resistive defects prior to machine failure.
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Nigh Phillip J.
Van Horn Jody J.
Charioui Mohamed
Hoff Marc S.
International Business Machines - Corporation
Walsh, Esq. Robert A.
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