Abstractor

Details Abstractor Abstractor

1992-10-09

1995-01-24

MacDonald, Allen R.

395 24, G06F 1518

Patent

active

053848977

ABSTRACT:
A digital 1-bit wide abstractor for generating an exemplary pattern from a digital input information E, the abstractor having an evaluation unit which performs a transfer function p and to whose input the digital input information E is fed. The abstractor further includes a first decision unit having a first input which is connected with an output of the evaluation unit, a second input to which the input information E is fed, and third and fourth inputs to which a first predeterminable set value and a second predeterminable set value, respectively, are fed, with the first decision unit implementing an activation state according to an activation function, the first decision unit providing at an output thereof an output information according to an output function.

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Strohbehn et al., "A Bit-Serial VLSI Receptive Field Accumulator", Proceedings of IEEE Custom Integrated Circuits Conference, May 15-18, 1989, pp. 12.5.1-12.5.6.
Carpenter et al., "ART 2: Self-Organization of Stable Category Recognition Codes for Analog Input Patterns," Applied Optics, vol. 26, No. 23, Dec. 1, 1987, pp. 4919-4930.
Lippmann, "An Introduction to Computing with Neural Nets," IEEE ASSP Magazine, Apr. 1987, pp. 4-22.

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