Absolute value decoder

Details Absolute value decoder Absolute value decoder

1989-10-13

1991-12-24

Mai, Tan V.

Boots, shoes, and leggings

36471508, 364748, G06F 700

Patent

active

050758799

ABSTRACT:
An absolute value decoder for decoding an absolute value of an input number in two's complement format. The absolute value decoder receives the input number and inverts each bit. Each bit and each inverted bit are provided to a plurality of columns, and each of the plurality of columns predecodes a unique value of the input number. A precoded signal is precharged during a precharge period and subsequently discharged in response to corresponding bits in the input number not matching the unique number corresponding to the predecoded signal. A grouping portion combines sets of two signals corresponding to a negative number and a positive number of a given absolute value, and provides output signals in response. In another embodiment, columns of transistors provide the predecoded signals for ranges of numbers which can be grouped further so that the absolute value decoder functions as a range detector.

REFERENCES:
patent: 3814925 (1974-06-01), Spannagel
patent: 4807172 (1989-02-01), Nukiyama
patent: 4811272 (1989-03-01), Wolrich et al.
patent: 4849921 (1989-07-01), Yasumoto et al.
patent: 4890251 (1989-12-01), Nitta et al.
patent: 4908788 (1990-03-01), Fujiyama

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