Absolute value comparator for differences

Details Absolute value comparator for differences Absolute value comparator for differences

1986-03-17

1988-08-02

Harkcom, Gary V.

Boots, shoes, and leggings

G06F 1566, G06F 750

Patent

active

047617594

ABSTRACT:
An absolute value comparator for differences comprising a first subtracter (1a) and a second subtracter (1b) each of which performs subtraction of n-bit digital values, a controller (8) for receiving most significant bit (MSB) carry output (g) from the first subtracter (1a) and MSB carry output (h) from the second subtracter (1b) to decide coincidence/incoincidence of the said signs as well as the sign of the output (f) from the second subtracter (1b), a first selecter (10a) for selectively passing either the output (e) from the first subtracter (1a) or a digital value obtained by inverting all bits of the output (e) responsive to a sign coincidence/incoincidence detecting signal (t) from the controller (8), a full adder (7) for receiving the sign coincidence/incoincidence detecting signal (u) from the controller (8) in its carry input terminal for the LSB stage to perform addition of output (q) from the least significant bit first selecter (10a) and the output (f) from the second subtracter (1b) to output a signal (r) indicating the sign of the result of calculation and a second selecter (10b) for selectively passing either the output (r) from the full adder (7) or an inverted signal thereof responsive to the sign detecting signal (v) from the controller (18) for the output (f) from the second subtracter (1b).

REFERENCES:
patent: 2907877 (1959-10-01), Johnson
patent: 3751651 (1973-08-01), Pomella et al.
patent: 4290111 (1981-09-01), Dillon
patent: 4648059 (1987-03-01), Gregorcyk

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