Amplifiers – With semiconductor amplifying device – Including gain control means
Reexamination Certificate
2003-09-29
2004-06-29
Shingleton, Michael B. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including gain control means
C330S199000, C330S127000, C330S096000, C330S102000
Reexamination Certificate
active
06756849
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the field of power amplifiers. More particularly, this invention relates to circuitry for detecting the output power of an RF power amplifier.
BACKGROUND OF THE INVENTION
In some applications utilizing a power amplifier, it is desirable to limit the peak voltage that the switching devices of the power amplifier are subjected to. For example, in CMOS devices, the transistor breakdown voltage may be only slightly greater than the supply voltage. Therefore, CMOS devices are not well suited to traditional power amplifier designs, where switching devices are subjected to voltages at least twice the supply voltage.
FIG. 1
is a schematic diagram of a conventional Class E amplifier. As shown, a transistor M
1
is connected between ground and an inductor L
1
which is connected to a voltage source V
dd
. The gate of the transistor M
1
is connected to an input signal Vi. The connection of the transistor M
1
and the inductor L
1
forms a node labeled Vd. The switching device M
1
, as well as other switching devices described may be comprised of any suitable switching devices, for example, MOSFETs or other transistor types. A capacitor C
1
is connected between Vd and ground. The amplifier includes a transformation network consisting of inductor L
2
and capacitor C
2
. The capacitor C
2
is connected to a load R
L
at output node V
o
.
FIG. 2
is a timing diagram illustrating the input signal Vi and the resulting voltage at Vd. As shown, the input signal Vi is a square wave signal switching between ground and V
dd
. When the input signal Vi is high (V
dd
), the transistor M
1
is turned on, holding Vd to ground. When the input signal Vi transitions to low, transistor M
1
turns off and the voltage at Vd rises above V
dd
. During this time, the transistor M
1
must sustain this high drain-to-source voltage. After peaking, the voltage at Vd decreases until it reaches ground. In a typical prior art Class E design, this peak voltage is approximately 3.6 V
dd
. Although the peak voltage can be reduced slightly, it can not be decreased below about 2.5 V
dd
since the average voltage at Vd must equal V
dd
. Designs such as that shown in
FIG. 1
are not well suited to certain device technologies, such as CMOS, where transistor breakdown voltages are only slightly higher than the supply voltage.
It can therefore be seen that there is a need for amplifier designs where the peak voltages applied to the transistors of the amplifier are reduced so that they are below the transistor breakdown voltages of the devices being used to implement the design.
Another problem relating to amplifiers relates to the use of differential circuits. It is difficult to perform differential-to-single-ended conversion when a single ended load is required with high efficiency. Therefore, there is a need for improved differential-to-single-ended conversion designs.
Another problem relating to amplifiers relates to detecting the output power of an amplifier for purposes of controlling the output power of the amplifier. For example, in a power regulation circuit for a cellular telephone power amplifier, there is a need to sense the power delivered to the antenna. The sensed power is used to help control the output power of the power amplifier. One problem with detecting the output power of an amplifier results when there is an unknown load on the amplifier. This problem may be worse when the load is a radiating antenna since direct power measurement through thermal analysis is not possible.
SUMMARY OF THE INVENTION
A power detector is provided for detecting the output of a power amplifier comprising: a voltage sensor coupled to the power amplifier for sensing the voltage provided to the output of the power amplifier; a first envelope detector coupled to the voltage sensor; a current sensor coupled to the power amplifier for sensing the current provided to the output of the power amplifier; a second envelope detector coupled to the current sensor, a mixer coupled to first and second envelope detectors for generating an output signal from the sensed voltage and sensed current that is related to the output power of the power amplifier.
Another embodiment of the invention provides a method of detecting the output power of a power amplifier comprising the steps of: sensing the magnitude of the voltage at the output of the power amplifier; sensing the magnitude of the current at the output of the power amplifier; and generating a signal using the sensed output voltage and sensed output current, wherein the generated signal is proportional to the output power of the power amplifier.
Another embodiment of the invention provides a method of controlling the output power of an RF power amplifier comprising the steps of: generating a first signal that is proportional to the magnitude of the voltage at the output of the RF power amplifier; generating a second signal that is proportional to the magnitude of the current at the output of the RF power amplifier, generating a power control signal based on the first and second signals; and using the power control signal to control the output power of the RF power amplifier.
Other objects, features, and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows below.
REFERENCES:
patent: 6677821 (2004-01-01), Kusunoki et al.
patent: 637011 (1988-01-01), None
Berglund “A note 0n Power-Law Devices and Their Effect on Signal-to-Noise Ratio” IEEE Transactions on Information Theory vol. 10, Issue 1, Jan. 1964 52-57.
Dupuis Timothy J.
Niknejad Ali M.
Paul Susanne A.
Welland David R.
Johnson & Associates
Shingleton Michael B.
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