Absolute phasing circuit

Details Absolute phasing circuit Absolute phasing circuit

1999-12-06

2001-06-12

Grimm, Siegfried H. (Department: 2817)

Demodulators

Phase shift keying or quadrature amplitude demodulator

C329S310000, C375S332000, C375S371000

Reexamination Certificate

active

06246281

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an absolute phasing circuit for making the phase of a demodulated signal of a received phase shift keying modulated signal be coincident with the phase of the modulated signal on the transmitting side by correcting the phase rotation of the demodulated signal.
BACKGROUND RELATED ART
A conventional absolute phasing circuit of a satellite digital broadcasting receiver is shown in FIG.
4
. In a conventional absolute phasing circuit, a demodulation circuit
1
receives an intermediate frequency (IF) signal converted into a predetermined frequency from, for example, a received eight-phase shift keying modulated signal. The demodulation circuit
1
demodulates the received IF signal, for example, into baseband demodulation signals I(
8
) and Q(
8
) of the quantization bit number of
8
(in this specification, the numeral in ( ) such as I(
8
) and Q(
8
) represents the number of bits. If there is no confusion, they are written simply as I and Q where applicable). Upon reception of the baseband demodulation signals I(
8
) and Q(
8
), a frame synchronization circuit
2
captures a frame synchronization signal which is a known bit stream to output a frame synchronization pulse. At the same time, the frame synchronization circuit
2
compares the signal point arrangement of the captured frame synchronization signal with the original signal point arrangement on the transmitting side to obtain the present reception phase and output a phase rotation signal RT(3) =“XYZ”. In this case, the phase rotation signal RT(3) has three bits because of the eight-phase shift keying modulation.
There are eight reception phases each shifted by 45° in the case of the eight-phase shift keying modulation. The phase rotation signal RT(3) indicates a phase difference between the signal arrangement on the transmitting side and the signal point arrangement on the receiving side. RT(3) is supplied as an address signal to a ROM
31
which constitutes a remapper. The baseband demodulation signals I(
8
) and Q(
8
) are reversely rotated by an amount corresponding to the phase difference to obtain absolute phased baseband demodulation signals I′(
8
) and Q′(
8
) (which are written simply as I′ and Q′ where applicable by omitting the numbers of bits).
In this specification, phase rotation of signal point arrangement on the receiving side is called remapping, and the remapper means a phase rotation circuit which performs remapping.
Next, remapping will be described with reference to FIG.
5
. FIG.
5
(
a
) shows signal point arrangement for eight-phase shift keying modulation. With the eight-phase shift keying modulation, a digital signal (abc) of three bits can be transmitted by using one symbol. There are eight combinations of symbols, including (000) (001), . . . , (111). Each of these symbols is converted into one of signal points
0
to
7
on the vector plane of I- and Q-axes shown in FIG.
5
(
a
).
It is assumed herein that the symbol length of the frame synchronization signal used on the transmitting side is “16” and that the pattern of the frame synchronization signal is a fixed converted pattern which appears at the signal points “
0
” and “
4
” shown in FIG.
5
(
a
) at the same probability and is received by the frame synchronization circuit
2
of the receiver.
The frame synchronization circuit
2
of the receiver shown in
FIG. 4
captures the frame synchronization signal, and the signal point arrangement on the receiving side is compared with that of the transmitting side. In this case, depending upon the phase of the carrier reproduced by the demodulation circuit
1
of the receiver, the frame synchronization circuit
2
captures the frame synchronization signal constituted of the signal point arrangement “
0
” and “
4
” shown in FIG.
5
(
a
) same as that on the transmitting side, of the signal point arrangement “
1
” and “
5
”, of the signal point arrangement “
2
” and “
6
”, of the signal point arrangement “
3
” and “
7
”, or any one of the inverted signal point arrangements of those four frame synchronization signals described above, totaling in eight signal point arrangements. It cannot be known at which phase the frame synchronization signal is captured.
However, by monitoring the signal point arrangement of the captured frame synchronization signal, it is possible to estimate at which phase the frame synchronization signal was captured, i.e., at which phase the baseband demodulation signals I and Q were demodulated. Basing upon the estimated reception phase difference, ROM
31
as the remapper outputs the baseband demodulation signals I′ and Q′ in the following manner.
It is assumed for example that the receiver captures the frame synchronization signal constituted of the signal point arrangement of “
0
” and “
4
” shown in FIG.
5
(
a
). In this case, since the signal point arrangement on the receiving side is the same as that on the transmitting side, it is not necessary to perform the remapping. Therefore, the frame synchronization circuit out puts the phase rotation signal RT(3) =“000”, and ROM
31
outputs I′ =I and Q′=Q.
If the receiver captures the frame synchronization signal constituted of the signal point arrangement of “
1
” and “
5
” shown in FIG.
5
(
b
), it means that the frame synchronization signal constituted of the signal point arrangement of “
0
” and “
4
” and transmitted from the transmitting side was received after the phase rotation of 45° in the counter-clockwise direction, i.e., at the reception phase rotation of &thgr;=45°. In order to obtain an absolute phase same as that of the signal point arrangement on the transmitting side, it is therefore necessary to rotate the phase of the reception signal by 45° in the clockwise direction. Namely, the phase of the signal received at “1” in FIG.
5
(
b
) is rotated to “0” and the phase of the signal received at “5” in FIG.
5
(
b
) is rotated to “4”.
This reverse phase rotation is performed by ROM
31
as the remapper. A parameter representing the phase rotation angle corresponds to the phase rotation signal RT(3) shown in FIG.
4
. The value of the phase rotation signal RT(3) is defined by the following equation (1):
RT(3)=&thgr;/45  (1)
where &thgr;=n·45° and n is an integer of 0 to 7.
If the signal is received at &thgr;=45°, the phases of the baseband demodulation signals I and Q are rotated by −45° (=−&thgr;=&phgr;) to obtain the absolute phase. Using the equation (1), the frame synchronization circuit outputs RT(3)=“001”. Upon reception of RT(3), ROM
31
as the remapper rotates the input baseband demodulation signals I and Q by an angle &phgr; by the following equations (2) and (3) in the case of the eight-phase shift keying modulation:
I′=I cos(&phgr;)−Q sin(&phgr;)  (2)
Q′=I sin(&phgr;)−Q cos(&phgr;)  (3)
Similarly, if the reception rotation angle &thgr; is 90°, 135°, 180°, . . . , or 315°, the frame synchronization circuit outputs RT(3)=“010 ”, “011 ”, “100”, . . . , or “111”, and ROM
31
as the remapper performs the phase conversion by using the equations (1), (2) and (3) to obtain the absolute phased baseband demodulation signals I′ and Q′.
PROBLEMS TO BE SOLVED BY THE INVENTION
The conventional absolute phasing circuit is, however, associated with the problem that a capacity of ROM constituting the remapper becomes large. The capacity necessary for ROM depends upon the number of quantization bits of the baseband demodulation signals I and Q. If the number of quantization bits of the baseband demodulation signals I and Q is 8 bits, 19 (=3 +8 +8) addresses are required. Therefore, the capacity of ROM constituting the remapper becomes as large as 2
19
×16.
SUMMARY OF THE INVENTION
The object of the present invention is to provide an absolute phasing circuit having a simple phase rotating means constituting a remapper.
The abs

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