Absolute encoder

Details Absolute encoder Absolute encoder

2001-01-23

2002-05-07

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Phase or time of phase change

C250S231140, C250S231180

Reexamination Certificate

active

06384752

ABSTRACT:

TECHNICAL FIELD
This invention relates to a vernier-type absolute encoder and in particular to a vernier-type absolute encoder concerning signal processing in absolute value signal generation and input signals (phase signal and phase difference signal) and in particular to an absolute encoder hard to be affected by a phase error between slit strings caused by distortion of a detection waveform or the like in simple operation processing and adaptable to high-speed rotation.
BACKGROUND OF THE INVENTION
In general, a vernier-type absolute encoder in a related art generates phase difference signals from two pairs of phase signals, determines the pitch number of a shorter-pitch phase difference signal from a longer-pitch phase difference signal, repeats this process in order, and last determines the pitch number of the phase signal of the largest number of pitches.
FIG. 13
is a schematic representation of the operation of an absolute encoder in a related art. As shown here, if the pitch length of a phase difference signal is 4:1, the relation between phase predicted value &phgr;b′ and pitch number predicted value N of a short-pitch phase difference signal in phase &phgr;a of a long-pitch phase difference signal is
&phgr;
b′=
4&phgr;
a−
2
N&pgr;
where N is found as a value of 0<&phgr;b′<2 &pgr; among 0, 1, 2, and 3.
Next, the pitch number is determined from &phgr;b actually obtained.
If the pitch number predicted value is 1 and &phgr;b′<&pgr; as in
FIG. 13
,
(1) when 0<&phgr;b<&phgr;b′+&pgr;, the pitch number is determined 1 equal to the predicted value; or
(2) when &phgr;b′+&pgr;<&phgr;b<2 &pgr;, the pitch number is determined 0 resulting from subtracting 1 from the predicted value.
In such a method, if the phase error between the signals is, in the example, theoretically within ±&pgr;/4 (which becomes ½ resulting from dividing 2 &pgr; by pitch rate 4) in terms of angle represented by the phase angle of &phgr;a, the pitch number can be determined correctly.
In fact, the following processing is performed for the digital phase difference signals:
Letting &phgr;a and &phgr;b be a four-bit (t
3
, t
2
, t
1
, t
0
) signal and a four-bit (s
3
, s
2
, s
1
, s
0
) signal respectively, first a tentative pitch number (pitch number predicted value) is determined based on the high-order two bits of &phgr;a.
The tentative pitch number becomes as follows:
When the high-order two bits (t
3
, t
2
) of &phgr;a are
(
0
,
0
): 0
(
0
,
1
): 1
(
1
,
0
): 2
(
1
,
1
): 3.
For example, if the bit string of &phgr;a, (t
3
, t
2
, t
1
, t
0
), is (
0
,
1
,
0
,
0
), the pitch number predicted value becomes 1.
Next, the low-order two bits (t
1
, t
0
) of &phgr;a are compared with the high-order two bits (s
3
, s
2
) of &phgr;b, whereby the tentative pitch number is corrected and the pitch number of &phgr;b is determined finally.
The correction of the pitch number will be discussed by taking a case where the low-order two bits (t
1
, t
0
) of &phgr;a are (
0
,
0
) as an example.
If the high-order two bits (s
3
, s
2
) of &phgr;b are
(1) (
0
,
0
) or (
0
,
1
), the pitch number is determined 1 equal to the predicted value;
(2) (
1
,
1
), the pitch number is determined 0 resulting from subtracting 1 from the predicted value. (3) However, if the high-order two bits are (
1
,
0
), the error from the predicted value becomes equal when the pitch number
1
or
0
, and the pitch number cannot be determined.
There is a possibility that the state of (3) will be entered if the phase error between &phgr;a and &phgr;b becomes equal to or greater than &pgr;/8 in terms of angle represented by the phase angle of &phgr;a; it is seen that the pitch number cannot be determined. In this example, the allowance of the phase error becomes a half that under an ideal condition.
However, in the above-described example in the related art, the following problem is involved: To determine the pitch number of a short-pitch phase difference signal from a long-pitch phase difference signal, a determination processing function of a computing element (microprocessor), etc., is required.
There is a condition under which the pitch number cannot be determined, thus the allowance of the phase error between the signals lessens.
If the number of bits involved in signal processing is few, the allowance of the phase error lessens; if the number of bits involved in processing is increased to grow the allowance of the phase error and bring the condition close to the ideal condition, operation processing becomes complicated. This is a problem.
It is therefore an object of the invention to provide a low-cost, high-reliability absolute encoder hard to be affected by a phase error between slit strings caused by distortion of a detection waveform or the like by performing simple operation processing without requiring a determination processing function of a computing element, etc.
DISCLOSURE OF THE INVENTION
To the end, according to an aspect of the invention, there is provided an absolute encoder comprising a scale having a plurality of tracks different in the number of pitches where position information repeated at the same pitches is formed, a plurality of sensors for making a relative move to the scale for detecting the position information, a phase modulation section for converting signals from the sensors into phase signals, a digital conversion section for converting the phase signals and each phase difference signal between two arbitrary phase signals into digital signals, and an absolute value signal generation section for generating a signal concerning an absolute position based on the digitized phase signals and the digitized phase difference signals, characterized in that
when the phase signals &phgr;
0
, &phgr;
1
, &phgr;
2
, &phgr;
3
. . . are j-bit digital signals represented as
&phgr;
0
=2&pgr;a
0
x+b
0
&phgr;
1
=2&pgr;a
1
x+b
1
&phgr;
2
=2&pgr;a
2
x+b
2
&phgr;
3
=2&pgr;a
3
x+b
3
. . .
where a
0
, a
1
, a
2
, a
3
, . . . are each the number of pitches, x is relative displacement between scale and sensor, b
0
, b
1
, b
2
, b
3
, . . . are each an initial phase,
the absolute value signal generation section sets the numbers of pitches a
0
, a
1
, a
2
, a
3
. . . so that
the number of pitches of phase difference signal &phgr;
01
between &phgr;
0
and &phgr;
1
(a
0
−a
1
),
the number of pitches of phase difference signal &phgr;
02
between &phgr;
0
and &phgr;
2
(a
0
−a
2
),
the number of pitches of phase difference signal &phgr;
03
between &phgr;
0
and &phgr;
3
(a
0
−a
3
)
. . .
become
a
0
/(a
0
−a
1
)=2
K1
(a
0
−a
1
)/(a
0
−a
2
)=2
K2
(a
0
−a
2
)/(a
0
−a
3
)=2
K3
. . .
where k
1
, k
2
, k
3
. . . are each an integer,
an absolute value signal A
01
of the number of pitches (a
0
−a
1
) can be generated in such a way that the high-order k
1
bits of the signal A
01
is that of the signal provided by subtracting the signal that is provided by dividing &phgr;
0
by 2
K1
from &phgr;
01
whereas the low-order bits of the signal A
01
is &phgr;
0
. Next, an absolute value signal A
02
of the number of pitches (a
0
−a
2
) can be generated in such a way that the high-order k
2
bits of the signal A
02
is that of the signal provided by subtracting the signal that is provided by dividing A
01
by 2
K2
from &phgr;
02
whereas the low-order bits is A
01
. Executing these processes in order can generate a longer-pitch absolute value signal.
Specifically, positions of the position information on the scale are formed or a phase adjustment circuit is provided so that a phase &pgr; point of &phgr;
0
becomes a phase zero point of &phgr;
01
, that a phase &pgr; point of A
01
becomes a phase zero point of &phgr;
02
, and that a phase &pgr; point of A
02
becomes a phase zero point of &phgr;
03
.
More specifically, the phase adjustment circuit inputs a phase adjustment signal into a shift register, generates a pluralit

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