Abbreviated incrementer circuit

Details Abbreviated incrementer circuit Abbreviated incrementer circuit

1988-12-20

1991-01-01

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Including structure for detecting or indicating overflow...

377116, 377117, H03K 2116, H03K 2110

Patent

active

049824147

ABSTRACT:
An incrementer circuit includes a plurality of input terminals for receiving an address data, having a plurality of bits, to be incremented, a carry signal generating unit for generating a carry signal for each bit of the address data and a plurality of output terminals where an incremented address data appears. The carry signal generating unit includes a detector for detecting whether or not all of a predetermined number of less significant bits of the address data are at high level and outputs a detection signal if so. In response to this detection signal, a carry signal is generated and supplied to a bit which is more significant than the most significant bit of the predetermined number of less significant bits by one bit.

REFERENCES:
patent: 3631350 (1971-12-01), Drake
patent: 3753127 (1973-08-01), Rowe
patent: 4400615 (1983-08-01), Asami et al.
patent: 4493095 (1985-01-01), Yazawa
patent: 4611337 (1986-09-01), Evans
patent: 4630295 (1986-12-01), Kamuro et al.
patent: 4759043 (1988-07-01), Lewis
patent: 4780894 (1988-10-01), Watkins et al.

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