A ternary signal transmission circuit and method

Details A ternary signal transmission circuit and method A ternary signal transmission circuit and method

1993-09-03

1995-08-22

Chin, Stephen

Pulse or digital communications

Multilevel

375257, H04L 2534, H04L 2549, H04B 300

Patent

active

054447402

ABSTRACT:
A signal transmission system provides stable, fast, long-range transmission. During transmission, a short-width pulse is synchronized with rising and falling edges of a transmission pulse signal. A ternary output signal in a differential shape is produced on the basis of the pulse, and an output signal is transmitted through series resistors via a pair of transmitting wirings. During reception, a reception terminal is provided with terminal resistors corresponding to a characteristic impedance of the transmitting wirings. A signal having passed through one of the transmitting wirings is detected with reference to a signal having passed through the other transmitting wiring. A signal having passed through the other transmitting wiring is detected with reference to the signal having passed through the one transmitting wiring. Additionally, the original pulse signal is restored and reproduced on the basis of the detected signals. The signals to be transmitted through the paired transmitting wirings are bipolar pulses or differential pulses which are generated only at the rising and falling times of the pulse signal to be transmitted. The pulses are given a complementary transmission waveform having a small amplitude divided by the series resistors at the transmission side and the terminal resistors at the reception side. In consideration of the above, and since the signals containing no-DC component can be transmitted, the charging and discharging phenomena of the inter-line capacities and the DC shift can be eliminated to accomplish long-range transmissions at a high speed.

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Gabara, T. J., et al. "High Speed, Low Power CMOS Transmitter-Receiver System," Proceedings of the 1988 International Conference on Computer Design: VLSI in Computers and Processors--ICCD Oct. 3-5, 1988, pp. 344-347.
Yoneda, Takashi, et al. "An ECL Compatible Full CMOS 210Mbps Crosspoint Switch," IEEE Custom Integrated Circuits Conference, May 1989, pp. 10.7.1 through 10.7.4.
Gabara, Thaddeus J., et al. "High Speed, Low Power CMOS Transmitter-Receiver System," International Conference on Computer Devices, Oct. 3-5, 1988, pp. 344-347.

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