Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Patent
1988-11-17
1989-09-05
Hecker, Stuart N.
Static information storage and retrieval
Addressing
Including particular address buffer or latch circuit...
36518912, 36518905, 365221, 3072722, G11C 700
Patent
active
048645443
ABSTRACT:
A memory cell is comprised of a cross-coupled master latch and a cross-coupled slave latch. The memory cell includes means for switching on and off power supplies connected to the master latch and the slave latch so as to control the direction of shift in a bidirectional shift. Data is shifted in a first direction when the power supply connected to the master latch is switched off, and data is shifted in a second direction when the power supply connected to the slave latch is switched off.
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IBM Technical Disclosure Bulletin, vol. 26, No. 12, May 84, pp. 6341-6343, "Universal Shifter" by S. Borret.
Spak Michael E.
Tyl Craig S.
Wottrich Philip C.
Advanced Micro Devices , Inc.
Chin Davis
Garcia Alfonso
Hecker Stuart N.
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