A/D with digital PLL

Dynamic magnetic information storage or retrieval – Head – Core

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360 51, G06F 104

Patent

active

058705910

ABSTRACT:
A digital arithmetic operation circuit includes a plurality of arithmetic operation blocks, a control signal generator and a selector. The plurality of arithmetic operation blocks receive a plurality of digital input signals and perform different arithmetic operations on the received digital input signals, in parallel, to output operation result signals. The control signal generator receives a plurality of digital input signals and generates a control signal based on the digital input signals. The selector selects one of the operation result signals, in response to the control signal, to output the selected operation result signal. After the control signal generator supplies the control signal to the selector, the selector outputs the selected operation result signal as soon as the selected operation result signal is supplied to the selector.

REFERENCES:
patent: 5572558 (1996-11-01), Beherns
patent: 5625632 (1997-04-01), Ishida et al.
patent: 5648738 (1997-07-01), Welland et al.
patent: 5668678 (1997-09-01), Reed et al.

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