A/D converter with auto-zeroed latching comparator and method

Details A/D converter with auto-zeroed latching comparator and method A/D converter with auto-zeroed latching comparator and method

1997-09-08

1999-09-21

Williams, Howard L.

Coded data generation or conversion

Converter compensation

H03M 110

Patent

active

059559780

ABSTRACT:
An A/D converter has an auto-zeroed latching comparator with an input offset voltage. The latching comparator is repetitively switched between an offset adjustment mode and a conversion mode. When the comparator is in the offset adjustment mode, the comparator compares the reference voltage to itself and generates an offset measurement output based on the comparison. A feedback circuit adjusts the input offset voltage based on the offset measurement output. When the comparator is in the conversion mode, the comparator compares the input signal to the reference voltage and generates the digital output signal based on the comparison.

REFERENCES:
patent: 4539551 (1985-09-01), Fujita et al.
patent: 4542354 (1985-09-01), Robinton et al.
patent: 4799041 (1989-01-01), Layton
patent: 5262779 (1993-11-01), Sauer
patent: 5745060 (1998-04-01), McCartney et al.

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