A-D converter testing circuit and D-A converter testing circuit

Details A-D converter testing circuit and D-A converter testing circuit A-D converter testing circuit and D-A converter testing circuit

1994-06-21

1996-12-10

Williams, Howard L.

Coded data generation or conversion

Converter calibration or testing

H03M 110

Patent

active

055835023

ABSTRACT:
There is disclosed an A-D converter testing circuit wherein exclusive-OR gates (13a, 13b) provide the exclusive-OR of the high-order bits (D.sub.1a, D.sub.1b) of the outputs of A-D converters (12a, 12b) and the exclusive-OR of the high-order bits (D.sub.1b, D.sub.1c) of the outputs of A-D converters (12b, 12c), respectively, and an OR gate (13c) provides the logical sum of the outputs of the both gates, which is "L" if all of the bits (D.sub.1a, D.sub.1b, D.sub.1c) are equal. A tri-state buffer (15a) receives the output of the OR gate (13c) at its control end and receives the bit (D.sub.1c) at its input. When all of the A-D converters are normal, all of the bits (D.sub.1a, D.sub.1b, D.sub.1c) are equal and are applied to the output of the tri-state buffer (15a). When one or some of the A-D converters are abnormal, the output of the tri-state buffer (15a) enters a high-impedance state. The A-D converter testing circuit, therefore, rapidly judges whether the A-D converters are defective or non-defective.

REFERENCES:
patent: 4538266 (1985-08-01), Miki
patent: 4736189 (1988-04-01), Katsumata et al.
patent: 4835535 (1989-05-01), Shibayama et al.
patent: 5124704 (1992-06-01), Kase et al.
Technical report of the Institute of Electronics, Information and Communication Engineers, ICD 89-119, Y. Okada, et al., "A Video Signal Processing LSI with AD/DA Converters", pp. 57-63.
Spring Conference 1992 of the Institute of Electronics, Information and Communication Engineers, S. Marukawa, et al., "Video Processing LSI with Multiple High Speed ADC", 1 page.
Technical Report of the Institute of Electronics, Information and Communication Engineers, ICD 92-120, Dec. 1992, Eiichi Teraoka, et al., "Built-In Self-Test in a Mixed-Signal Digital Signal Processor", pp. 39-44 (with English abstract).

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