A/D converter, method of A/D conversion, and signal...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S131000, C341S139000, C341S143000, C341S159000, C330S086000, C330S129000, C330S282000

Reexamination Certificate

active

06734817

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to analog-to-digital (A/D) converters, methods of A/D conversion, and signal processing devices.
In the information and communication field, signal processing has demanded digital processing, faster speeds, and broader bandwidths, and information and communication devices have required reduced sizes and weight. These trends have required A/D converters, which are crucial devices to the digital signal processing, to have faster speeds, broader bandwidths, and lower power consumption. Various components in A/D converters employ operational amplifiers, each of which serves a very important function. Examples of the operational amplifiers incorporated in A/D converters include a comparator, which compares a supplied analog input voltage with a reference voltage, a sample-and-hold circuit, which performs a sampling and holding operation of an input signal in order to achieve a faster speed and a broader bandwidth, a differential signal amplifier circuit, which is used for, for example, the signal amplification in a pipeline A/D converter, and the like.
FIG. 13
shows an example of the differential input-differential output operational amplifier used for A/D converters. The present circuit is biased by a constant current source Iss. The gate terminals of N-channel transistors M
1
and M
2
, which are input transistors, are respectively connected to an analog differential input signal-positive electrode Vin
+
and an analog differential input signal-negative electrode Vin

. The source terminals of the N-channel transistors M
1
and M
2
are connected to a reference voltage VSS. The gate terminals of P-channel transistors M
3
and M
4
are connected to a bias voltage Vb. The source terminals of the P-channel transistors M
3
and M
4
are connected to a power supply voltage VDD. The drain terminals of the N-channel transistor M
1
and the P-channel transistor M
3
are connected to an analog differential output signal-negative electrode Vout

. The drain terminals of the N-channel transistor M
2
and the P-channel transistor M
4
are connected to an analog differential output signal-positive electrode Vout
+
.
By the voltage-current conversion function of the N-channel transistors M
1
and M
2
, an analog differential input signal &Dgr;Vin=(Vin
+
−Vin

) is converted into a difference current &Dgr;Ids between a drain-source current Ids
1
that flows in the N-channel transistor M
1
and a drain-source current Ids
2
that flows in the N-channel transistor M
2
(&Dgr;Ids=(Ids
1
−Ids
2
)). The deltas &Dgr;Ids
1
and AIds
2
of the drain-source current Ids
1
and the drain-source current Ids
2
are obtained by the following equations: &Dgr;Ids
1
=gm
1
(&Dgr;Vin/2) and &Dgr;Ids
2
=gm
2
(&Dgr;Vin/2), respectively, where gm
1
is the transconductance of the N-channel transistor M
1
and gm
2
is the transconductance of the N-channel transistor M
2
. Given that the N-channel transistors M
1
and M
2
have the same characteristics, gm=gm
1
=gm
2
. Where the dynamic resistance of the output terminal is denoted by ro, an analog differential output signal &Dgr;Vout=(&Dgr;Vout
+
−&Dgr;Vout

) is obtained by the following equation: &Dgr;Vout=gm·&Dgr;Vin·ro. Accordingly, a voltage gain G of the present circuit can be obtained by the following equation: G=&Dgr;Vout/&Dgr;Vin=gm·ro.
In other words, the voltage gain G of the operational amplifier is proportional to the transconductance gm of the N-channel transistors M
1
and M
2
, which are input transistors. Moreover, the transconductance gm is approximately proportional to the drain-source current Ids flowing in the transistors. Therefore, in order to increase the voltage gain G, it is necessary to increase the drain-source current Ids.
To achieve a higher-resolution and faster-speed A/D converter, it is necessary to increase precision, gain, and speed of the operational amplifier.
Generally, operational amplifiers are operated at a constant current biased state. Accordingly, power consumption of an operational amplifier is approximately constant at all times.
As discussed above, in conventional A/D converters, the current flowing through the operational amplifier that is incorporated in an A/D converter does not change, and consequently, the performance of the A/D converter per se does not change even when the system requires a change in performance of the A/D converter. Generally, the performance of an A/D converter is approximately correlated with the power consumption. For these reasons, conventional A/D converters have at least the following problem. When the performance of the A/D converter is higher than the required performance of the A/D converter that is required by the system (when a performance overhead occurs), the A/D converter consumes electric power wastefully.
SUMMARY OF THE INVENTION
In view of the foregoing and other problems, it is an object of the present invention to reduce the power consumption of the overall system when the system requires a change in the performance of an A/D converter.
This and other objects are accomplished by the following aspects of the invention. More specifically, in accordance with one aspect, the present invention provides an A/D converter wherein its resolution is made variable by changing a current flowing through an amplifier with a control signal that specifies the resolution.
The invention also provides an A/D converter comprising: a controlling means for determining a resolution; an amplifier for changing a current with a signal from the controlling means; and a voltage comparator array to which an output from the amplifier is input; wherein the resolution is corrected by inputting the result of the comparison in the voltage comparator array into the controlling means.
In accordance with another aspect, the present invention also provides a signal processing device comprising: the above-described A/D converter; a signal processing means in which part of the performance is determined by the resolution of the A/D converter; a monitoring means for monitoring the performance of the signal processing means attributable to the resolution of the A/D converter and instructing the A/D converter to increase the resolution if a decrease of the performance is detected and to reduce the resolution if an overhead of the performance is detected. Preferably, the signal processing means is a digital demodulator circuit; and the performance is a bit error rate of the digital demodulator circuit.
In accordance with further another aspect, the present invention provides a method of A/D conversion, comprising: a voltage-inputting step of inputting a test voltage in an amplifier; a comparing step of comparing the voltage that is output from the amplifier with the test voltage; and a resolution-determining step of adjusting a current value of the amplifier according to the result obtained in the comparing step.
As described above, when the performance required by a system changes, the performance of the A/D converter can be changed according to the status of the system, and as a consequence, performance overheads can be prevented in A/D converters. Thus, power consumption of A/D converters can be reduced, and accordingly, power consumption of the whole system can be reduced.


REFERENCES:
patent: 5408233 (1995-04-01), Gannon et al.
patent: 5691720 (1997-11-01), Wang et al.
patent: 5818374 (1998-10-01), Tan
patent: 5844512 (1998-12-01), Gorin et al.
patent: 5892472 (1999-04-01), Shu et al.
patent: 5982315 (1999-11-01), Bazarjani et al.
patent: 6292120 (2001-09-01), Painchaud et al.
patent: 2002/0008788 (2002-01-01), Talmola et al.
patent: 2002/0149507 (2002-10-01), Kaul et al.

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