A/D converter having folded arrangement of voltage comparator

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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H03M 136

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active

055549896

ABSTRACT:
Voltage comparators C.sub.1 -C.sub.N for comparing a first differential reference voltage obtained by dividing a first reference voltage V.sub.RT and a second reference voltage V.sub.RB by ladder resistors r.sub.1 -r.sub.N+1 and a second differential reference input voltage formed by a third voltage V.sub.i and a fourth voltage V.sub.i are arranged in first to N/2 and (N/2+1)-th to N-th voltage comparator rows in a folded manner and wiring area can be reduced as a result.

REFERENCES:
patent: 4559522 (1985-12-01), Sekino et al.
patent: 4568910 (1986-02-01), Sekino et al.
patent: 4635036 (1987-01-01), Yoshizawa
patent: 4745393 (1988-05-01), Tsukada et al.
patent: 5019820 (1991-05-01), Matsuzawa et al.
patent: 5187483 (1993-02-01), Yonemaru
patent: 5416484 (1995-05-01), Lofstrom
"1993 Symposium on VLSI Circuits", Digest of Technical Papers, May 19, 1993, Kyoto, Japan.

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