Coded data generation or conversion – Analog to or from digital conversion – Increasing converter resolution
Patent
1994-07-20
1997-01-14
DeBoer, Todd
Coded data generation or conversion
Analog to or from digital conversion
Increasing converter resolution
341143, 341166, H03M 112
Patent
active
055944400
ABSTRACT:
Pulse signals indicating up or down of a time constant are received and counted. When a time-out occurs, a time constant change signal is output. At up counting, when input signal is low, the flip-flop 80 of each bit is forcibly set to 1. Then, an up counter consisting of the high-order two bits (control bits) is provided. A time constant of a variable integrator is changed in response to output of the high-order two bits, so that the time constant can be changed rapidly. On the other hand, if the input signal is high, a 5-bit down counter is provided. Thus, the time constant of the variable integrator can be changed gently.
REFERENCES:
patent: 4123709 (1978-10-01), Dodds et a.
H. R. Schindler, "Delta Modulation Coding", IBM Technical Disclosure Bulletin, vol. 13, No. 3, Nov. 1970, pp. 1564-1565.
European Search Report, dated Oct. 25, 1994, application No. 94205404.9.
Tsutomu Ishikawa, et al., "One-Bit A/D D/A Converters IC for Audio Delay", IEEETransactions on Consumer Electronics, vol. 35, No. 4, Nov. 1989.
D. L. Agostini, et al., "Delta Modulator", IBM Technical Disclosure Bulletin, vol. 19, No. 2 Jul. 1976, pp. 447-448.
DeBoer Todd
Sanyo Electric Co,. Ltd.
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