A/D converter having a dynamic encoder

Details A/D converter having a dynamic encoder A/D converter having a dynamic encoder

1998-09-29

2001-05-15

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S155000

Reexamination Certificate

active

06232908

ABSTRACT:

BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to an analog-to-digital converter (A/D converter) having a dynamic encoder and, more particularly to an A/D converter having a dynamic encoder for encoding a thermometric code into a binary code.
(b) Description of the Related Art
A/D converter is widely used to converting an input analog signal to a digital code which can be processed by a computer system. Referring to
FIG. 1
showing a conventional A/D converter called a flash A/D converter in JP-A-8-36466 (from Texas Instrument), wherein an input analog signal of a thermometric code is directly converted by using a dichotomizing search technique to output a binary code without generating an intermediate code. The flash A/D converter includes a comparator array
51
including a plurality of comparators
52
, and dichotomizing search encoder
53
including a plurality of D-flip-flops
54
and
56
, and a plurality of multiplexers
55
. The A/D converter has an advantage of reduction of the maximum sparkle error to a minimum. That is, the A/D converter has an advantage in that an input thermometric code having a bubbling error provides an output signal with an error as low as within one bit after error correction compared to the case in which an ideal thermometric code is input.
Specifically, referring to
FIG. 2
showing the results of conversion after error correction in the A/D converter of
FIG. 1
, an input analog signal of “level four” or a digital code “
100
” corresponding to an ideal thermometric code of (1111000) is input to the A/D converter, which achieves a binary code (011) after correction of error caused by bubbling. That is, the conventional A/D converter achieves an error within 1-bit level after the error correction.
The conventional flash A/D converter using a dichotomizing search technique as described above, however, has a problem in that the conversion rate or conversion speed thereof reduces in proportion to the increase of the number of bits of the input thermometric code. This is because the dichotomizing search technique in its nature can start the search for m-th bit in an N-bit code (0≦m≦N−2) only after the search for (m+1)-th bit and more significant bits is completed.
In other words, N-bit code of the output digital signal requires N times for search by the A/D converter because of the inter-bit dependency in the dichotomizing search technique, which limits the conversion rate of the A/D converter.
The conventional A/D converter has another problem in that the circuit scale and the power dissipation thereof increases with the increase of the number (N) of bits to be converted. This is partly because there is a phase difference between the most significant bit (MSB) and the least significant bit (LSB) of the code after the conversion, which requires timing flip-flops or latches in number corresponding to the number (N) of bits, partly because the search results for m+1)-th bit and more significant bits must be stored during the search for m-th bit, which requires the latches for storage in number corresponding to number of (2
N
−1), and partly because the dichotomizing search requires switching circuits in number corresponding to
∑
i
=
1
N
-
1
⁢
(
2
i
-
1
)
.
(
1
)
That is, if the number of bits is N, the A/D converter includes elements in number equal to:
(
N
+
(
2
N
-
1
)
)
×
8
+
[
∑
i
=
1
N
-
1
⁢
(
2
i
-
1
)
]
×
4
,
(
2
)
provided that D-flip-flops and multiplexers are implemented by eight elements and four elements, respectively. If N=3, for example, then the number of elements is as large as 96.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an improved A/D converter which has an improved function for high-speed conversion of a thermometric code to a binary code without losing an error correcting function, and which has a reduced circuit scale and reduced power dissipation.
It is another object of the present invention to provide a method for converting a thermometric code to a binary code, for use in an A/D converter without losing an error correcting function, at a high speed with a reduced circuit scale and reduced power dissipation.
The present invention provides an A/D converter comprising a reference voltage generator for generating a plurality of reference voltages, a comparing section including a plurality of comparing elements each comparing an input analog signal against a corresponding one of the reference voltages to output a thermometric code, and a dynamic encoder including a plurality of bit lines and a dynamic combinational circuit transferring the thermometric code to the bit lines by responding to a clock signal so that the thermometric code is converted in a single clock cycle to a binary code generated on the bit lines and corresponding to a magnitude of the input analog signal.
In accordance with the A/D converter of the present invention, since the conversion does not involve the inter-bit dependency, the conversion can be achieved in a single clock cycle so that the conversion rate of the A/D converter is improved. In addition, the circuit scale and power dissipation thereof can be reduced because the timing flip-flops or latches are not necessary in the present invention.
The present invention also provides a method for converting a thermometric code to a binary code, comprising the steps of comparing an input analog signal against a corresponding one of a plurality of reference voltages to output a thermometric code, and transferring the thermometric code to a plurality of bit lines by responding to a clock signal so that the thermometric code is converted to a binary code generated on the bit lines and corresponding to a magnitude of the input analog signal in a single clock cycle.
In accordance with the method according to the present invention, advantages similar to those as described with reference to the A/D converter of the present invention can be obtained.
The above and other objects, features and advantages of the present invention will be more apparent from the following description, referring to the accompanying drawings.


REFERENCES:
patent: 4733220 (1988-03-01), Knierim
patent: 5140188 (1992-08-01), Burns
patent: 5631593 (1997-05-01), Molin
patent: 5959564 (1999-09-01), Gross, Jr.
patent: 6028545 (2000-02-01), Chen
patent: 1-307318 (1989-12-01), None
patent: 7-202699 (1995-08-01), None
patent: 8-36466 (1996-02-01), None
patent: 8-293795 (1996-11-01), None
patent: 9-8662 (1997-01-01), None

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