A/D converter circuit capable of compensating A/D-converted digi

Coded data generation or conversion – Converter calibration or testing

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341118, H03M 110

Patent

active

059823127

ABSTRACT:
An analog-to-digital converter circuit includes an analog-to-digital converter, a memory connected to the analog-to-digital converter for receiving at least a part of the digital signals from the analog-to-digital converter to designate at least an address in accordance with the at least part of the digital signals, so that the memory is operated both to store compensating code data at the designated address in a compensation code capturing mode and to read out the compensating code data in an analog-to-digital conversion real operation mode. A control circuit is also included which is connected to the memory for controlling operation of the memory to switch between the compensation code capturing mode and the analog-to-digital conversion real operation mode.

REFERENCES:
patent: 4831382 (1989-05-01), Debus
patent: 4903023 (1990-02-01), Evan
patent: 4973974 (1990-11-01), Suzuki
patent: 5101205 (1992-03-01), Yasuda

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