A/D converter and converting method having coarse comparison and

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341159, H03M 114, H03M 136

Patent

active

053493540

ABSTRACT:
An improved serial-parallel type A/D converter is disclosed herein. A gate circuit 7 applies signals S11' to S14' provided from an encoder 3 only in a fine comparison period to switching circuits 11 to 14 as switching control signals S11 to S14. In the fine comparison period, one switching circuit is turned on, so that a fine comparison voltage is applied to voltage comparators 21 to 23. Since all of the switching circuits are turned off in a coarse comparison period, correct coarse comparison voltage is provided from a reference voltage generating circuit. As a result, a correct conversion in the coarse comparison period can be performed.

REFERENCES:
patent: 4903027 (1990-02-01), Takeuchi et al.
patent: 4912470 (1990-03-01), Hosotani et al.
"An 8-Mhz CMOS Subranging 8-Bit A/D Converter" by Andrew G. F. Dingwall et al., IEEE Journal of Solid-State Circuits, vol. SC-20, No. 6, Dec. 1985, pp. 1138-1143.
"An 8-bit 20-MS/s CMOS A/D Converter with 50-Mw Power Consumption", by Shiro Hosotani et al., IEEE Journal of Solid-State Circuits, vol. 25, No. 1, Feb. 1990, pp. 167-172.

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