A/D converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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Details

341158, H03M 136

Patent

active

052258378

ABSTRACT:
An A/D converter includes a resistor network generating a reference voltage, a level detector for detecting the level of an input analogue signal with a reference voltage from the resistor network as a reference, and an encoder for providing a digital signal by encoding the output of the level detector. The level detector includes a plurality of comparators for bilevel-processing the input analogue signal with a preselected voltage from the resistor connection nodes of the resistor network as a reference voltage. The resistor network comprises a plurality of resistor elements between a first node receiving a first reference voltage and a second node receiving a second reference voltage, which are interconnected to provide a voltage from an associated connection node that is 1/2.sup.j times the difference between said first reference voltage and said second reference voltage. The comparator includes capacitors for providing the difference between the input analogue signal and the reference voltage by a capacitor coupling, and an inverter amplifier for determining the positive or negative of the voltage change generated by the capacitors. This structure implements an A/D converter of high precision with less elements.

REFERENCES:
patent: 3242348 (1966-03-01), Sem-Sandberg et al.
patent: 4058806 (1977-11-01), Nadler
patent: 4618847 (1986-10-01), Iida et al.
patent: 4837572 (1989-06-01), Gulczynski
patent: 4928102 (1990-05-01), Katzenstein
patent: 4994808 (1991-02-01), Wichelman
Maio et al., "A 500 MHz 8b DAC", IEEE Journal of Solid-State Circuits, Feb. 13, 1985, pp. 78-80.
Joey Doernberg et al., "A 10-bit 5-Msample/S CMOS Two-Step Flash ADC", IEEE Journal of Solid-State Circuits, vol. 24, No. 2, Apr., 1989, pp. 241-249.

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