A/D converter

Coded data generation or conversion – Analog to or from digital conversion – Nonlinear

Reexamination Certificate

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Details

C341S155000

Reexamination Certificate

active

07394417

ABSTRACT:
In an A/D converter, each preamp102includes a preamp gain adjusting circuit109. The preamp gain adjusting circuit109suppresses the gain of the preamp102and restricts a positive-negative output potential difference of the preamp only when the positive-negative output potential difference of the preamp102exceeds a reference potential. Accordingly, in the case where the frequency of an input signal to the A/D converter is high, even when the gain of the preamp is increased due to fabrication process variation, temperature variation or supply voltage variation, output strain of the preamp is minimally caused, and the characteristic degradation of the A/D converter can be suppressed.

REFERENCES:
patent: 6480132 (2002-11-01), Yoshioka et al.
patent: 6707333 (2004-03-01), Matsumoto et al.
patent: 6707413 (2004-03-01), Sushihara et al.
patent: 6734817 (2004-05-01), Naka et al.
patent: 2003/0048213 (2003-03-01), Sushihara et al.
patent: 2003/0128145 (2003-07-01), Naka et al.
patent: 2003/0174012 (2003-09-01), Matsumoto et al.
patent: 2003-158456 (2003-05-01), None
patent: 2003-198368 (2003-07-01), None
patent: 2003-273657 (2003-09-01), None
patent: 3647806 (2005-02-01), None
Kouji Sushihara, et al., “A 6b 800MSample/s CMOS A/D Converter,” 2000 IEEE International Solid-State Circuits Conference, 2000, pp. 428-429, Session 26, Paper WP 26.2, IEEE.
Koji Sushihara, et al., “A 7b 450MSample/s 50mW CMOS ADC in 0.3mm2,” ISSCC 2002 Visuals Supplement, 2002, pp. 130-131. Session 10, 10.3, IEEE.

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