Coded data generation or conversion – Converter compensation
Patent
1994-06-08
1997-02-18
Gaffin, Jeffrey A.
Coded data generation or conversion
Converter compensation
341141, 341155, 123417, H03M 106
Patent
active
056045000
ABSTRACT:
In a control circuit including an A/D converter, a parallel-to-serial input buffer, a parallel input buffer, a serial-to-parallel output buffer and a parallel output buffer which are built in a chip, provided with a microcomputer, an A/D conversion is carried out by controlling a time of an A/D conversion conducted by the A/D converter correspondingly to a condition of an output port of the output buffer, thereby preventing an A/D converted value from being affected by an inversion in the output of the buffer.
REFERENCES:
patent: 4264898 (1981-04-01), Barman et al.
patent: 5025259 (1991-06-01), Abe
Gaffin Jeffrey A.
Kost Jason L. W.
Nippondenso Co. Ltd.
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