A/D conversion device and A/D converter error correction device

Coded data generation or conversion – Converter calibration or testing

Reexamination Certificate

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Details

C341S118000, C341S155000, C341S158000, C341S159000

Reexamination Certificate

active

06600434

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an A/D conversion device having a tuning function and an A/D converter error correction device for realizing the tuning function of an A/D converter.
BACKGROUND OF THE INVENTION
In recent years, the number of systems for converting an analog signal into a digital signal and conducting fine control based on a micro change in the digital signal increases. A system of this type requires a high accuracy A/D converter or a high resolution A/D converter. Normally, if device technology develops and a device becomes small in size, it becomes difficult to control a reference transition voltage related to the A/D converter. To manufacture a high accuracy A/D converter, however, it is necessary to suppress fluctuation in this reference transition voltage.
Further, the resolution of an A/D converter is normally fixed and various resolutions cannot be provided to a single A/D converter. Due to this, to manufacture a high accuracy A/D converter, it is necessary to prepare an A/D converter having a resolution required by a system for each resolution.
FIG. 1
is a block diagram showing the configuration of a conventional A/D conversion device for obtaining a highly accurate digital converted value. As shown in
FIG. 1
, this A/D conversion device is constituted so that an analog input voltage is amplified by an amplifier
11
, the amplified voltage is subjected to A/D conversion by an A/D conversion circuit
12
, and the obtained digital converted value is supplied to, for example, a central processing unit or CPU
13
.
FIG. 2
is a block diagram showing another configuration of a conventional A/D conversion device for obtaining a highly accurate digital converted value. As shown in
FIG. 2
, this A/D conversion device is constituted so that an analog input voltage value is converted into a digital value by an A/D conversion circuit
16
, the digital converted value is subjected to an error correction using a correction value stored in a register
18
by an arithmetic section
17
and a digital output value is thereby obtained. Each of the A/D converters
12
and
16
employed herein as shown in
FIGS. 1 and 2
includes, as an analog voltage comparison circuit, resistors and capacitors as many as bits according to resolution.
The A/D conversion device wherein an analog input voltage is amplified and then subjected to A/D conversion has disadvantages in that an error occurs to the analog voltage value when the analog input voltage value is amplified by the amplifier and that an error derived from fluctuation in the reference transition voltage of the A/D conversion circuit
12
occurs.
Furthermore, the A/D conversion device wherein a digital converted value is subjected to arithmetic operation to correct an error has a disadvantage in that it takes long time to obtain error corrected data since each digital converted value is subjected to an arithmetic operation. Besides, since the resolution of the A/D conversion device is determined according to the number of resistors and capacitors mounted on the A/D conversion device at the time of manufacturing the conversion device, A/D conversion cannot be performed with the fixed resolution and varied resolutions cannot be, therefore, obtained with a single configuration.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an A/D conversion device which can dispense with an amplifier for amplifying an analog input voltage and an arithmetic circuit for performing an error correction arithmetic operation and which has a function to correct an error derived from fluctuation in a reference transition voltage unique to a product.
It is another object of the present invention to provide an A/D converter error correction device for realizing a function to correct an error derived from fluctuation in a reference transition voltage unique to a product. It is still another object of the present invention to provide an A/D conversion device for realizing an A/D converter having a high resolution.
FIG. 3
is a principle view which shows the configuration of a high accuracy A/D conversion device according to the present invention. This A/D conversion device is constituted as follows. As shown in
FIG. 3
, a zero transition voltage is inputted, as an analog input, into an A/D converter
21
and a digital converted value obtained by the A/D converter
21
is fed back to a device fluctuation correction circuit
23
by a feedback circuit
22
. Likewise, a full transition voltage is inputted into the A/D converter
21
and an A/D converted value obtained by the A/D converter
21
is fed back to the device fluctuation correction circuit
23
. Then, the error of the full transition voltage is converted into an analog voltage through a full transition voltage correction D/A converter
24
and the resultant analog voltage is supplied, as an H (a high) side reference voltage AVRH, to the A/D converter
21
.
Likewise, the error of the zero transition voltage is converted into an analog voltage by D/A converter
25
for correction of the zero transition voltage and the resultant analog voltage is supplied, as an L (a low) side reference voltage AVRL, to the A/D converter
21
. By doing so, it is possible to correct the error of the full transition voltage and the error of the zero transition voltage and to thereby improve the accuracy of the A/D converter
21
.
FIG. 4
is a principle view which shows the configuration of a high resolution A/D conversion device according to the present invention. This A/D conversion device is constituted as follows. As shown in
FIG. 4
, first, an analog input voltage value is converted into a digital value by an A/D converter
31
while setting the H side reference voltage AVRH of the A/D converter
31
at a power source voltage Vcc and the L side reference voltage AVRL thereof at 0 V. The obtained A/D converted value is fed back to a high resolution corresponding circuit
36
by a feedback circuit
32
, the A/D converted value thus fed back is stored in the internal register or the like of the circuit
36
and it is determined whether the analog input voltage is not less than ½ Vcc or not more than ½ Vcc.
If the analog input voltage is not less than ½ Vcc, the high resolution corresponding circuit
36
controls the output of an AVRL adjustment D/A converter
35
and raises the L side reference voltage AVRL to ½ Vcc. On the other hand, if the analog input voltage is not more than ½ Vcc, the high resolution corresponding circuit
36
controls the output of an AVRH adjustment D/A converter
34
to decrease the H side reference voltage AVRL to ½ Vcc. As stated above, after the difference between the H side reference voltage AVRH and the L side reference voltage AVRL is decreased to half the original difference, A/D conversion is carried out again, thereby making it possible to carry out the A/D conversion with a resolution twice as high as the original resolution.
This operation is repeated by a desired number of times. Then, an additional digital value stored in the high resolution corresponding circuit
36
is assumed as a significant bit value, the digital converted value obtained in the A/D converter
31
is assumed as a less significant bit value and the significant bit value and less significant bit value are merged with each other by a merge circuit
37
to thereby obtain a digital converted value having a desired number of bits. It is noted that the number of times of repetition of A/D conversion with a resolution twice as high as the original resolution is set by a counter or the like included in the high resolution corresponding circuit
36
. By doing so, it is possible to perform A/D conversion with a desired resolution and to thereby realize an A/D converter having a higher resolution.
Other objects and features of this invention will become understood from the following description with reference to the accompanying drawings.


REFERENCES:
patent: 4549165 (1985-10-01), Brian
patent: 4973974 (1990-11-01), Suzuki

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