A.C. Testing of logic arrays

Details A.C. Testing of logic arrays A.C. Testing of logic arrays

1982-12-30

1985-03-05

Tokar, Michael J.

Electricity: measuring and testing

Plural, automatically sequential tests

371 21, 371 25, 324 73AT, G01R 1512

Patent

active

045033870

ABSTRACT:
A test for the input and output circuitry of a logic array including means to disable the AND matrix and means selectively connecting the true and complement output of the input buffers directly to the output circuitry. Means are provided for activating and testing the exclusive OR in the output circuitry and selectively disable one of a combined input/output buffer pair.

REFERENCES:
patent: 4034290 (1977-07-01), Warren
patent: 4104588 (1978-08-01), Westberry
patent: 4435805 (1984-03-01), Hsieh et al.
patent: 4461000 (1984-07-01), Young

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