Pulse or digital communications – Receivers – Particular pulse demodulator or detector
Reexamination Certificate
1998-04-24
2001-07-31
Pham, Chi (Department: 2631)
Pulse or digital communications
Receivers
Particular pulse demodulator or detector
Reexamination Certificate
active
06269129
ABSTRACT:
FIELD OF THE INVENTION
The present claimed invention relates to cable modems. More particularly, the present claimed invention relates to quadrature amplitude modulation trellis coded modulation decoders.
BACKGROUND ART
Originally, cable networks were established to provide TV signals to a community that otherwise could not receive reliable TV signals. With subsequent addition of more channels, cable TVs have gained enormous popularity in the general segment as well. With the advent of the Internet and other digital communications, however, cable networks and channels have become a focus for transmitting digitized information at high speed and bandwidth. This is because a cable network can provide a high speed digital communication channel in addition to well known traditional cable services.
In cable networks, cable modems provide high speed data transporting functions between a cable network and a connected user. Cable modems typically implement a forward error correction (FEC) scheme. Prior Art
FIG. 1
illustrates a conventional cable modem transmission block diagram
100
depicting an FEC scheme that complies with the standard of ITU-T Recommendation J-83 Annex B. The ITU-T Recommendation J-83 Annex B specifies using 64- and 256- quadrature amplitude modulation (QAM). The cable transmission block diagram
100
includes an FEC encoder
102
, an FEC decoder
104
, and a cable channel
106
. The FEC encoder
102
encodes data using conventional FEC schemes for transmission to the FEC decoder
104
through the cable channel
106
.
The FEC encoder
102
includes a Reed Solomon (RS) encoder
108
, a convolutional interleaver
110
, a randomizer
112
(e.g., scrambler), and a Trellis coded modulation (TCM) encoder
114
. The RS encoder
108
sequentially receives
122
byte (i.e., symbol) packets with each byte containing 7 bits. Each packet contains 122 7-bit symbols or bytes. The RS encoder
108
adds six 7-bit redundancy bytes for correcting up to 3 symbol errors. The RS encoded 128 7-bit symbol packets are then transmitted to the interleaver
110
for convolutionally interleaving the symbols by modifying the order of the symbols in a packet. Convolutional interleaving is designed to reduce burst mode errors.
The interleaver
110
sequentially transmits the RS encoded and interleaved
128
7-bit symbol packets to the randomizer
112
. The randomizer
112
adds a pseudorandom noise sequence of 7 bit symbols by performing bit-wise exclusive-OR operations to the symbols in an FEC frame (e.g., packet) to assure a random transmitted sequence. As used herein, an FEC frame refers to a packet that is processed in sequential fashion in the FEC encoder
102
and FEC decoder
104
. The randomizer
112
thus provides even distribution of symbols in the constellation (e.g., 64 QAM, 256 QAM) to enable the modem to maintain proper phase lock during the transmission of data.
The randomized data packets, each of which includes 128 7-bit symbols, are then serially transmitted to the TCM encoder
114
. As will be discussed below, the TCM encoder
114
adds redundancy to the data to improve the signal-to-noise ratio by increasing the symbol constellation without increasing the symbol rate. The TCM encoded data is then sent to the FEC decoder
104
over the cable channel
106
. The conventional FEC encoder
102
including the RS encoder
108
, the interleaver
110
, the randomizer
112
, and the TCM encoder
114
is known in the art and is described, for example, in a standard recommended by ITU-T (International Telecommunication Union) Recommendation J.83 entitled “Digital Multi-Programme Systems for Television Sound and Data Services for Cable Distribution,” which is incorporated herein by reference in its entirety. For example, the ITU-T Recommendation J.83 specifies a single chip 64/256-QAM TCM encoder, which may be used to encode the inner code for a concatenated decoding scheme of North American cable modem.
The FEC decoder
104
includes a TCM decoder
116
, a de-randomizer
118
, a convolutional de-interleaver
120
, and an RS decoder
122
. The TCM decoder
116
receives the data serially from the FEC encoder
102
via the cable channel
106
and decodes the TCM encoded data. The TCM decoded data is then transmitted to the de-randomizer
118
and de-randomizes the symbols in the 128 7-bit symbol packets. After de-randomizing, the convolutional de-interleaver
120
receives the de-randomized data and de-interleaves the symbols in the 128 7-bit symbol packets. The de-interleaver
120
then transmits the de-interleaved data to the RS decoder
116
.
The RS decoder
116
decodes the received data by performing RS error detection and correction on the received data. This RS decoding removes the 6 7-bit redundancy symbols added by the RS encoder
108
and thereby generates the original MPEG framed data of 122 7-bit symbol or byte packets as output.
The concatenated FEC coding scheme described in the ITU-T standard employs trellis coding for the inner code. The use of the trellis coding introduces redundancy to improve the signal-to-noise ratio by increasing the symbol constellation without increasing the symbol rate. Such coding is referred to as “trellis coded modulation” or “TCM” for short.
Prior Art
FIG. 2A
illustrates a block diagram of a conventional TCM encoder
114
. The TCM encoder
114
of Prior Art
FIG. 2
is a 64-QAM TCM encoder, which encodes a group of four RS encoded symbols into five consecutive 64-QAM symbols for mapping into five consecutive 64 QAM signals. The 64-QAM TCM encoder
114
serially receives 128 7-bit FEC frames (e.g., packets). A parser
202
identifies a group of four 7-bit symbols as RS1, RS2, RS3, and RS4 and assigns the symbols RS1 and RS2 as in-phase “I” component and assigns the symbols RS3 and RS4 as quadrature “Q” component. The symbol RS1 includes seven bits I
0
, I
1
, I
2
, I
3
, I
4
, I
5
, and I
6
; the symbol RS2 includes bits I
7
, I
8
, I
9
, I
10
, I
11
, I
12
and I
13
; RS3 includes 7 bits Q
0
, Q
1
, Q
2
, Q
3
, Q
4
, Q
5
, and Q
6
; and RS4 includes bits Q
7
, Q
8
, Q
9
, Q
10
, Q
11
, Q
12
, and Q
13
. Since each symbol contains 7 bits, the total number of input bits for the four symbols is 28 bits with 14 bits each for I and Q symbols.
In this parsing scheme, the parser
202
assigns the individual bits of the I and Q symbols RS symbols into two groups as follows: two upper or most significant uncoded bit streams
212
and
214
and one lower or least significant bit coded bit stream
206
and
208
. For the I component, the parser
202
outputs two upper uncoded bit streams
212
: one stream including bits I
1
, I
4
, I
7
, I
10
, and I
12
, and the other stream including bits I
2
, I
5
, I
8
, I
11
, and I
13
. For the lower coded bit stream
216
of the I component, the parser
202
outputs the bits I
0
, I
3
, I
6
, and I
9
for transmission to a differential encoder
204
.
Likewise, for the Q component, the parser
202
outputs two upper uncoded bit streams
214
: one stream including bits Q
1
, Q
4
, Q
7
, Q
10
, and Q
12
, and the other stream including bits Q
2
, Q
5
, Q
8
, Q
11
, and Q
13
. For the lower coded bit stream
218
of the Q component, the parser
202
outputs the bits Q
0
, Q
3
, Q
6
, and Q
9
for transmission to the differential encoder
204
. The two upper uncoded bit streams
212
and
214
of I and Q components are transmitted to a 64-QAM mapper
210
.
With reference still to Prior Art
FIG. 2A
, the differential encoder
204
receives the lower streams
216
and
218
of I and Q components in sequence and performs a 90 degree rotationally invariant trellis coding for each corresponding pair of I and Q bits as received. Specifically, the differential encoder
204
performs the rotationally invariant trellis coding for the I and Q bit pairs as they are received as follows: I
0
and Q
0
, I
3
and Q
3
, I
6
and Q
6
, and I
9
and Q
9
. This allows the information to be carried by the change in phase, rather than by the absolute phase. The differential encoder
204
then transmits the differentially encoded lower
Rhee Do-jun
Souvanthong Chanthachith
Burd Kevin
LSI Logic Corporation
Pham Chi
LandOfFree
64/256 quadrature amplitude modulation trellis coded... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with 64/256 quadrature amplitude modulation trellis coded..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and 64/256 quadrature amplitude modulation trellis coded... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2449292