50 MHz 40-bit accumulator with trigger capability

Details 50 MHz 40-bit accumulator with trigger capability 50 MHz 40-bit accumulator with trigger capability

1999-05-11

2002-10-01

Mai, Tan V. (Department: 2124)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S490000

Reexamination Certificate

active

06460066

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to an accumulator, and more particularly, to a high speed accumulator having trigger and continuous modes.
BACKGROUND OF THE INVENTION
An accumulator is generally used to perform arithmetical or logic operation. Besides, the contents of an accumulator can be cleared to 0 under program control. In addition, an accumulator is capable of performing shift, complement and test operations. Therefore, accumulators are widely used in electronic equipment.
Conventional accumulators have the following disadvantages: (1) the conventional accumulators lack trigger function, and thus can be operated in continuous mode only; (2) conventional numeric control oscillators are composed of an accumulator and a memory storing with sinusoidal waveform data, and most of the conventional accumulators cannot achieve 1 mHz frequency resolution when the accumulators are operated at 50 MHz clock frequency, wherein the frequency resolution f
L
of an accumulator is represented as
f
L
=f
S
/2
N
wherein f
S
is the clock frequency and N is the bit number of the accumulator, because most of the conventional accumulators are 32 bits , the frequency resolution of the conventional accumulators is not good enough; and (3) most of the conventional accumulators embedded in a numerical control oscillator does not have output pin, that is to say, conventional accumulators cannot be applied to an arbitrary waveform generator.
SUMMARY OF THE INVENTION
In view of the disadvantages of the prior art, it is an object of the present invention to provide a high speed accumulator which can be operated at 50 MHz clock frequency and can be combined with static random access memory (SRAM) so as to be applied to digital frequency synthesizer, function generator and arbitrary waveform generator, etc..
It is another object of the invention to provide a high speed accumulator having two operation modes—trigger mode and continuous mode. Under trigger mode, the accumulator waits for a trigger signal to initiate its operation, while under continuous mode, the accumulator works without any trigger signal.


REFERENCES:
patent: 4215416 (1980-07-01), Muramatsu
patent: 5208770 (1993-05-01), Ito
patent: 5937010 (1999-08-01), Petranovich et al.
patent: 6073155 (2000-06-01), Inabata et al.
patent: 6199085 (2001-03-01), Ihm

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