5 Volt tolerant 3.3 volt output buffer

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override

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Details

327316, 327108, 326 81, 326 21, 326 87, H03K 1716

Patent

active

057215081

ABSTRACT:
Circuit for preventing the improper functioning of a CMOS output buffer that may occur due to the fact that since the output buffer P-channel may be coupled between a supply voltage and an output pad. If the pad is driven higher than the supply voltage by an external source, current may be injected into the parasitic diodes of the source/drain of the transistor.

REFERENCES:
patent: 5004936 (1991-04-01), Andresen
patent: 5570043 (1996-10-01), Churchill

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