5-Bit counter/shift register utilizing current mode logic

Details 5-Bit counter/shift register utilizing current mode logic 5-Bit counter/shift register utilizing current mode logic

1977-01-03

1978-05-30

Atkinson, Charles E.

Registers

Systems controlled by data bearing records

Time analysis

235 92EC, 364738, G06F 1110

Patent

active

040925226

ABSTRACT:
A 5-bit D-type master/slave counter/shift register with buffered outputs is disclosed. The counter implements the load, count up, count down, and reset functions and also has the capability to be reconfigured into an inverting serial shift register for Non-Functional Test (NFT) techniques. In addition, the fifth bit may optionally be removed from the counter logic and used as a parity bit, although it will be necessary to use some external logic to implement this parity function.

REFERENCES:
patent: 3555255 (1971-01-01), Toy
patent: 3567916 (1971-03-01), Fullton, Jr.
patent: 3699322 (1972-10-01), Dorr
patent: 3701892 (1972-10-01), Carter et al.
patent: 3732407 (1973-05-01), Brewster et al.

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