4-Phase clock generator

Details 4-Phase clock generator 4-Phase clock generator

1983-12-27

1985-11-19

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307480, 307291, 328 62, 328 63, H03K 3037, H03K 515

Patent

active

045544654

ABSTRACT:
A 4-phase clock generator comprises four gates for generating four clock signals from a master clock signal. The logic levels of four clock signals change in predetermined order after the master clock signal changes from a first logic level to a second logic level and they change in inverse order after the master clock signal changes back to the first logic level. The four clock signals are suitable to operate a shift register without making the adjoining transfer gates of the shift register conductive simultaneously.

REFERENCES:
patent: 3448295 (1969-06-01), Wanlass
patent: 3740660 (1973-06-01), Davies, Jr.
patent: 3961269 (1976-06-01), Alvarez, Jr.
patent: 4230951 (1980-10-01), Suzuki et al.
patent: 4283639 (1981-08-01), Roesler
patent: 4420696 (1983-12-01), Gemma et al.
patent: 4463440 (1984-07-01), Nishiura et al.
Cordaro et al., "Programmable On-Chip Clock Generator", IBM Tech Disc Bull, vol. 17, No. 4, Sep. 1974, pp. 1051-1052.
Rauf, "Unclocked Sequence Generator", IBM Tech Disc Bull, vol. 18, No. 1, Jun. 1975, pp. 182-183.
Grunbok et al., "Double Pulse Generator", IBM Tech Disc Bull, vol 20, No. 1, Jun. 1977, pp. 200-201.
Howes et al., "Large Scale Integration", Wiley, pp. 156-158, 1981.

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