3D RRAM

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

Reexamination Certificate

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Reexamination Certificate

active

07009278

ABSTRACT:
A memory array layer for use in a 3D RRAM is formed, with peripheral circuitry, on a silicon substrate; layers of silicon oxide, bottom electrode material, silicon oxide, resistor material, silicon oxide, silicon nitride, silicon oxide, top electrode and covering oxide are deposited and formed. Multiple memory array layers may be formed on top of one another. The RRAM of the invention may be programmed in a single step or a two step programming process.

REFERENCES:
patent: 6723643 (2004-04-01), Pan et al.

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