Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2008-06-05
2011-10-18
Geyer, Scott B (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S127000, C438S618000, C257S686000, C257S724000, C257S730000, C257S773000, C257S787000
Reexamination Certificate
active
08039306
ABSTRACT:
A reconstituted electronic device including: a first face and a second face; a plurality of individual chips placed perpendicular to the faces, each individual chip carrying, on one of its surfaces, at least one component, tracks, and a connection mechanism that are flush with one or other of the faces of the reconstituted electronic device; and an encapsulant that encapsulates the individual chips.
REFERENCES:
patent: 4706166 (1987-11-01), Go
patent: 5104820 (1992-04-01), Go et al.
patent: 5353498 (1994-10-01), Fillion et al.
patent: 5362986 (1994-11-01), Angiulli et al.
patent: 5604377 (1997-02-01), Palagonia
patent: 5616962 (1997-04-01), Ishikawa et al.
patent: 5673478 (1997-10-01), Beene et al.
patent: 5688721 (1997-11-01), Johnson
patent: 5719438 (1998-02-01), Beilstein et al.
patent: 5726492 (1998-03-01), Suzuki et al.
patent: 5793116 (1998-08-01), Rinne et al.
patent: 5904502 (1999-05-01), Ference
patent: 5910682 (1999-06-01), Song
patent: 5943213 (1999-08-01), Sasov
patent: 5956236 (1999-09-01), Corisis et al.
patent: 5963793 (1999-10-01), Rinne et al.
patent: 5990566 (1999-11-01), Farnworth et al.
patent: 6151220 (2000-11-01), Sakamoto et al.
patent: 6198164 (2001-03-01), Choi
patent: 6380616 (2002-04-01), Tutsch et al.
patent: 6734538 (2004-05-01), Sturcken
patent: 7050303 (2006-05-01), Park et al.
patent: 7429782 (2008-09-01), Brunnbauer et al.
patent: 2002/0042163 (2002-04-01), Kim
patent: 2005/0023656 (2005-02-01), Leedy
patent: 2007/0023883 (2007-02-01), Brunnbauer et al.
patent: 199 20 444 (1999-11-01), None
patent: 10 2005 030 465 (2007-01-01), None
patent: 0 695 494 (2001-02-01), None
patent: 2 300 047 (1996-10-01), None
patent: WO 94/26083 (1994-11-01), None
Ciaran Cahill, et al., “Thermal Characterization of Vertical Multichip Modules MCM-V”, IEEE Transactions on Components, Packaging and Manufacturing Technology, Part A, vol. 18, No. 4, XP000542882, Dec. 1, 1995, pp. 765-771.
Baleras François
Poupon Gilles
Souriau Jean-Charles
Verrun Sophie
Commissariat A l'Energie Atomique
Geyer Scott B
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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