Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents
Reexamination Certificate
2011-04-19
2011-04-19
Clark, Jasmine J (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With provision for cooling the housing or its contents
C257S686000, C257S714000, C257S715000, C438S109000, C438S122000
Reexamination Certificate
active
07928563
ABSTRACT:
Three dimensional integrated circuits with microfluidic interconnects and methods of constructing same are provided. According to some embodiments, and microfluidic integrated circuit system can comprise a plurality of semiconductor die wafers each having a top and bottom exterior surface. The semiconductor die wafers can form a stack of die wafers. The die wafers can comprise one or more channels formed through the die wafers. The channels can extend generally between top and bottom exterior surfaces of the semiconductor die wafers. A plurality of micro-pipes can be disposed between adjacent semiconductor die wafers in the stack. The micro-pipes can enable the channels to be in fluid communication with each other. A barrier layer can be disposed within at least one of the channels and the micro-pipes. The barrier layer can be adapted to prevent a coolant flowing through the at least one of the channels and the micro-pipes from leeching into the channels and micro-pipes. Other embodiments are also claimed and described.
REFERENCES:
patent: 6287949 (2001-09-01), Mori et al.
patent: 6710435 (2004-03-01), Nagaya et al.
patent: 7266267 (2007-09-01), Bakir et al.
patent: 2007/0172987 (2007-07-01), Dugas et al.
patent: 88/02979 (1988-04-01), None
patent: 2007/071674 (2007-06-01), None
Dang, Bing (Ph. D. Thesis); “Integrated Input/Output Interconnection and Packaging for GSI;” Georgia Institute of Technology School of Electrical and Computer Engineering; Apr. 17, 2006; pp. 1-209.
Dang, Bing; Joseph, Paul; Bakir, Muhannad; Spencer, Todd; Kohl, Paul; and Meindl, James; “Wafer-Level Microfluidic Cooling Interconnects for GSI;” 2005 IEEE; pp. 180-182.
Dang, Bing; Bakir, Muhannad S.; and Meindl, James D.; “Integrated Thermal-Fluidic I/O Interconnects for an On-Chip Microchannel Heat Sink;” IEEE Electron Device Letters; vol. 27, No. 2; Feb. 2006; pp. 117-119.
Thompson, Terrence E.; “Exploring Options for Keeping the Heat Out;” Aug./Sep. 2006 Chip Scale Review; pp. 42-53.
Toon, John; “Beating the Heat: Liquid Cooling Technique Uses Microfluidic Channels Integrated onto the Backs of Chips;” Jun. 21, 2005; Georgia Tech Research News; pp. 1-4.
Bakir, Muhannad S.; Dang, Bing; and Meindl, James D.; “Revolutionary NanoSilicon Ancillary Technologies for Ultimate-Performance Gigascale Systems;” IEEE 2007 Custom Integrated Circuits Conference (CICC); pp. 421-428.
Topol, A.W., et al.; “Three-dimensional Integrated Circuits;” IBM Journal of Research & Development; vol. 50, No. 4/5, Jul./Sep. 2006; pp. 491-506.
Gurrum, Siva P.; Suman, Shivesh K.; Joshi, Yogendra K.; and Fedorov, Andrei G.; “Thermal Issues in Next-Generation Integrated Circuits;” IEEE Transactions on Device and Materials Reliability; vol. 4, No. 4, Dec. 2004; pp. 709-714.
Thacker, Hiren Dilipkumar (Ph.D. Thesis); “Probe Modules for Wafer-Level Testing of Gigascale Chips with Electrical and Optical I/O Interconnects;” Georgia Institute of Technology School of Electrical and Computer Engineering; May 2006; pp. 1-252.
Koo, Jae-Mo; IM, Sungjun; Jiang, Linan; and Goodson, Kenneth E.; “Integrated Microchannel Cooling for Three-Dimensional Electronic Circuit Architectures;” Journal of Heat Transfer; Jan. 2005, vol. 127; pp. 49-58.
Tukerman, D.B. and Pease, R.F.W.; “High-Performance Heat Sinking for VLSI;” IEEE Electron Device Letters, vol. EDL-2, No. 5, May 1981; pp. 126-129.
Viswanath, Ram; Wakharkar, Vijay; Watwe, Abhay; and Lebonheur, Vassou; “Thermal Performance challenges from Silicon to Systems;” Intel Technology Journal, Q3, 2000; pp. 1-16.
Internet Article from www.bgasockets; Aug.-Sep. 2006; p. 29.
Bakir Muhannad S.
Dang Bing
King, Jr. Calvin
Meindl James D.
Sekar Deepak
Clark Jasmine J
Georgia Tech Research Corporation
Schneider Ryan A.
Troutman Sanders LLP
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