2-D discrete cosine transform circuit with reduced number of mul

Details 2-D discrete cosine transform circuit with reduced number of mul 2-D discrete cosine transform circuit with reduced number of mul

1991-12-17

1994-01-04

Herndon, Heather R.

Image analysis

Histogram processing

For setting a threshold

395129, 395130, 395133, 382 56, 382 44, 364725, G06F 1562

Patent

active

052767841

ABSTRACT:
An image data processing apparatus includes a <v> calculating block 7 for calculating a vector <v> from a vector <x> which has 64 elements in a real space and which has been generated as a sequence of image data in 8 rows and 8 columns in the real space, a <w> calculating block 8 for calculating a vector <w> from the vector <x> in the real space, and a <c> calculating block 9 for adding and subtracting elements of the vector <v> and elements of the vector <w>, thereby producing a vector <c> which has 64 elements in a space of spatial frequencies. The elements of the vector <c> in the space of spatial frequencies are arranged into data in 8 rows and 8 columns in the space of spatial frequencies.

REFERENCES:
patent: 4449194 (1984-05-01), Wilhelm
patent: 4481605 (1984-11-01), Chase
patent: 4791598 (1988-12-01), Liou et al.
Discrete Cosine Transform IEEE Transactions on Computers Jan. 1974 pp. 90-93.

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