1X asynchronous data sampling clock

Details 1X asynchronous data sampling clock 1X asynchronous data sampling clock

1991-08-28

1994-07-05

Chin, Stephen

Pulse or digital communications

Spread spectrum

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375118, 370108, 307480, 307269, 328 63, H04L 704

Patent

active

053274660

ABSTRACT:
A circuit for retiming asynchronous data. A sampling clock is derived in which the system clock frequencies are no higher than that of the data frequency. The leading edge of the signal from a received data-to-clock position circuit and a bias distortion circuit are combined and decoded to determine the center of the received data to select the proper sampling clock for the received data.

REFERENCES:
patent: 4604582 (1986-08-01), Strenkowski et al.

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