1R1D R-RAM array with floating p-well

Details 1R1D R-RAM array with floating p-well 1R1D R-RAM array with floating p-well

2005-02-01

2005-02-01

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Miscellaneous

C365S148000

Reexamination Certificate

active

06849564

ABSTRACT:
A low-capacitance one-resistor/one-diode (1R1D) R-RAM array with a floating p-well is provided. The fabrication method comprises: forming an integrated circuit (IC) substrate; forming an n-doped buried layer (buried n layer) of silicon overlying the substrate; forming n-doped silicon sidewalls overlying the buried n layer; forming a p-doped well of silicon (p-well) overlying the buried n layer; and, forming a 1R1D R-RAM array overlying the p-well. Typically, the combination of the buried n layer and the n-doped sidewalls form an n-doped well (n-well) of silicon. Then, the p-well is formed inside the n-well. In other aspects, the p-well has sidewalls, and the method further comprises: forming an oxide insulator overlying the p-well sidewalls, between the n-well and the R-RAM array.

REFERENCES:
patent: 5818749 (1998-10-01), Harshfield
patent: 6483368 (2002-11-01), Mayer et al.

Affiliated with

Also associated with

Rating

1R1D R-RAM array with floating p-well does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with 1R1D R-RAM array with floating p-well, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and 1R1D R-RAM array with floating p-well will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3484342