Boots – shoes – and leggings
Patent
1984-08-23
1987-09-01
Chan, Eddie P.
Boots, shoes, and leggings
G06F 930
Patent
active
046912827
ABSTRACT:
A 16-bit microprocessor (.mu.P) system uses memory access data consisting of: a status field for memory control data including a specific bit; a segment field; and a 16-bit address field. In a .mu.P, an instruction under execution comprises an .alpha. instruction in an operand fetch cycle, an index-modified value of a 16-bit lower logical address is set in an MAR, and a sum of an 8-bit upper logical address word and a carry flag is set in an SGB (Segment Register B). The .mu.P sets the memory control data having the specific bit of a first logic level in an MCS (Memory Control Status Register), and thereafter generates the memory access data. In this case, the content of the SGB is used for the segment field in place of the segment number stored in an SGA (Segment Register A). When the specific bit of the status field of the memory access data from the .mu.P, is set at a second logic level, a segment/page table is accessed by the segment field and part (page number) of the address field, thereby generating the page data. A basic address space is accessed by a physical address obtained by linking the page data and the remaining data (displacement) of the address field. On the other hand, when the specific bit is set at the first logic value, a expanded address space is accessed by a physical address obtained by linking the segment field and the address field.
REFERENCES:
patent: 3938096 (1976-02-01), Brown et al.
patent: 4084228 (1978-04-01), Dufond et al.
patent: 4128875 (1978-12-01), Thurber et al.
patent: 4385352 (1983-05-01), Bienvenu
patent: 4481570 (1984-11-01), Wiker
Chan Eddie P.
Kabushiki Kaisha Toshiba
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