1 transistor cell for EEPROM application

Details 1 transistor cell for EEPROM application 1 transistor cell for EEPROM application

1999-09-02

2000-10-31

Elms, Richard

Static information storage and retrieval

Floating gate

Particular biasing

365218, G11C 1604

Patent

active

061412554

ABSTRACT:
Memory devices having 1-transistor flash memory cells that in one embodiment allows bit-by-bit erase and in other embodiments allows erase of a multi-bit word. The word can be 8 bits, 16 bits, 32 bits, 64 bits or any size word. The memory devices have source bitlines that are connected to the bitline driver that controls the bitlines. The bitline driver and a wordline driver controls the voltages applied to selected bitlines, source bitlines while the wordline driver controls the voltage applied to selected wordlines to allow selected memory cells to be programmed, erased, or read.

REFERENCES:
patent: Re36210 (1999-05-01), Santin
patent: 5047981 (1991-09-01), Gill et al.
patent: 5177705 (1993-01-01), McElroy et al.
patent: 5267209 (1993-11-01), Yoshida
patent: 5412603 (1995-05-01), Schreck et al.
patent: 5467307 (1995-11-01), D'Arrigo et al.
patent: 5471428 (1995-11-01), Barani et al.
patent: 5646890 (1997-07-01), Lee et al.

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