Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2001-09-24
2003-04-15
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S143000, C341S118000, C341S131000, C341S172000, C341S155000
Reexamination Certificate
active
06549152
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
This application is based on and hereby claims priority to PCT Application No. PCT/DE00/00886 filed on Mar. 22, 2000 and German Application No. 199 12 827.8 filed on Mar. 22, 1999 in Germany, the contents of which are hereby incorporated by reference.
BACKGROUND OF THE INVENTION
The invention relates to high resolution digital-analog converters based on the principle of sigma-delta modulation, as are able to be used in multistandard or multicarrier base transceiver stations (“Software Radio”). In addition, such converters are suitable for all technical problems faced in which 1-bit quantized digital signals need to be converted into analog signals.
The task of such a 1-bit digital-analog converter is to convert digital input values, namely—1 and +1, into analog voltage or current pulses. Such 1-bit digital-analog converters are based on delta modulation, which can be regarded as a special case of differential pulse code modulation. Ideally, this should produce pulses whose waveforms are absolutely identical over the duration of one bit and which differ only in terms of their polarity. A typical application of such 1-bit digital-analog converters is in the field of DS digital-analog converters (DS—delta sigma) and DS digital-analog converters. In the case of the DS digital-analog converter, the frequency used to sample a band-limited signal is increased to a multiple of twice the bandwidth, and the word length of the samples is reduced to up to 1-bit. In the converse case of the DS digital-analog converter, a 1-bit data stream is produced and is then supplied to a 1-bit digital-analog converter in the corresponding case. The output of the digital-analog converter then produces a spectrum which corresponds to the digital input spectrum within a frequency band of interest.
This is illustrated, by way of example, in K. D. Kammeyer “Nachrichtenübertragung”, B. G. Teubner, Stuttgart 1996, ISBN 3-519-16142-7, pages 134 ff. A prerequisite for the analog output spectrum to correspond to the digital input spectrum within a frequency band of interest is that the integral of an output pulse is of identical magnitude for all pulses and has a negative or positive arithmetic sign merely on the basis of the polarity of the digital input value. This means, in particular, that the pulse integral can be dependent only on the digital input value and not on the previous digital history. For converters having a high dynamic range, even small asymmetries in the positive and negative pulses must therefore likewise be prevented, such as the smallest influences of the preceding data bit, which are referred to as memory effects.
The printed publication “A 3.2-GHz Second-Order Delta-Sigma Modulator implemented in InP HBT Technology”, IEEE J. of Solid-State Circuits, US, Vol. 30, No. 10, October 1995, pp. 1119-1127 discloses a 1-bit digital-analog converter whose signal unit I
DAC
is decoupled from a switching unit (transistors with switching signals DAC input) by means of a cascade.
U.S. Pat. No. 5,638,011 discloses a 1-bit digital-analog converter whose switching unit Q
2
is decoupled from the signal unit, which is formed by Q
1
, and from the output, formed by Q
3
, by means of a cascade.
FIGS. 9A
,
9
B and
10
A,
10
B show customary circuit designs for 1-bit digital-analog converters described, by way of example, in Jayaraman et al., “Linear High-Efficiency Microwave Power Amplifiers Using Bandpass Delta-Sigma Modulators”, IEEE Microwave and Guided Wave Letters, Vol. 8, No. 3, March 1998, pp. 121-123, and in W. Gao and W. M. Snelgrove, “A 950-MHz IF Second-Order integrated LC Bandpass Delta-Sigma Modulator”, IEEE J. Solid-State Circuits, Vol. 33, No. 5, May 1998, pp. 723-732.
Thus,
FIG. 9A
shows a 1-bit digital-analog converter circuit in which a sequence of current pulses which is produced by a current pulse shaping unit or else a constant current i is switched by a switching unit, comprising the switches S
1
and S
2
, to the positive or negative output path OUT
1
, OUT
2
of a differential current output under the control of a differential digital input signal DATAP, DATAM.
FIG. 9B
shows a simple embodiment of the circuit shown in
FIG. 9A
, in which the two switches S
1
, S
2
are produced by two transistors T
1
, T
2
. In the design shown in
FIG. 10A
, the voltage output OUT is switched to the voltage UP or UM, again under the control of differential digital input signals DATAP and DATAM. In full analogy to the design shown in
FIG. 9A
, the voltages UP and UM may be constant or else may have a prescribed pulse shape.
In the circuits shown in
FIGS. 9A and 9B
and likewise in
10
A and
10
B, the fact that the components used are not ideal means that the outputs interact, which goes against the demands on a 1-bit digital-analog converter which were expressed at the outset.
Explained in more detail, the way in which the circuit design shown in
FIG. 9A
works is based on the feature that a supplied current i is switched to the positive or negative input path OUT
1
or OUT
2
of a differential current output using a current switch S
1
, S
2
on the basis of the polarity of the differential digital input signal DATAP or DATAM. In this context, the input current i can assume a constant value, an “NRZ pulse”, or else may have an already preshaped pulse shape. To keep down the effects of variations in the transistor properties or switch properties, cf.
FIG. 9B
, namely offset voltages, the balanced state of the switching transistors T
1
and T
2
should be quickly passed through, as is normal for switch operation. This means that it is not advisable to shape the output pulse using the two inputs. An inherent drawback of the design is therefore that, by way of example, a digital “+1” following the digital value “−1” is assessed differently than a digital “+1” which has likewise been preceded by a “+1”. In the first case, a changeover operation takes place in the current switch S
1
or S
2
, which is inevitably associated with crosstalk effects and switching transients on account of the switching transistors T
1
, T
2
not being ideal, while in the second case no kind of switching operation is triggered and such effects therefore do not arise. This results in a design-related asymmetry in the response of the digital-analog converter. This property, which is shown using
FIG. 9B
, is likewise possessed by the circuit shown in
FIGS. 10A and 10B
, should be apparent.
One aspect of the invention is therefore based on the object of providing a 1-bit digital-analog converter whose asymmetric properties are reduced.
This means that very slight influences from previous control bits of a switching unit used are not meant to have any influence on the output signal, and the memory effect, which is so called for this reason, is meant to be prevented. Alternatively, interaction, caused by the fact that the components used are not ideal, is meant to be prevented. If pulses are produced as output signals, then their waveform over the duration of one bit is meant to be absolutely identical, that is to say that when an integral of an output pulse is formed, the value of the integral is meant to be of identical magnitude for all pulses. Even small asymmetries in the pulses are meant to be prevented.
SUMMARY OF THE INVENTION
One aspect of the present invention relates to 1-bit digital-analog converters having two inputs, one or two outputs, switching units and one or two pulse shaping units, with outputs, switching unit and the pulse shaping units being decoupled from one another by decoupling units. Such decoupling units can be formed by cascade isolation stages, with the cascade isolation stages being formed by transistors T
5
, T
6
, T
7
. Preferably, the cascades are operated with a bias current, in which case alternate changeover of the constant currents can be provided in a dynamic element matching stage.
One aspect of the present invention also relates to a 1-bit digital-analog converter having one or two outputs, two inputs, a switching u
Mai Lam T.
Siemens Aktiengesellschaft
Staas & Halsey , LLP
Tokar Michael
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